<!-- HTML header for doxygen 1.8.3.1-->
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
<meta name="generator" content="Doxygen 1.8.13"/>
<title>Nordic Thingy:52 v2.2.0 : drv_sx1509_bitfields.h Source File</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="dynsections.js"></script>
<link href="navtree.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="resize.js"></script>
<script type="text/javascript" src="navtreedata.js"></script>
<script type="text/javascript" src="navtree.js"></script>
<script type="text/javascript">
  $(document).ready(initResizable);
</script>
<link href="search/search.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="search/searchdata.js"></script>
<script type="text/javascript" src="search/search.js"></script>
<link href="doxygen.css" rel="stylesheet" type="text/css" />
<link href="extra_stylesheet_offline.css" rel="stylesheet" type="text/css"/>
<link href="nordic.css" rel="stylesheet" type="text/css" />
</head>
<body>
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0" width="100%" class="blank">
 <tbody>
 <tr style="height: 56px;">
  <td id="projectlogo"><img alt="Nordic Semiconductor" src="nordic_small.png"/></td>
  <td style="padding-left: 0.5em;">
   <div id="projectname">Nordic Thingy:52 v2.2.0
   </div>
  </td>
 </tr>
 </tbody>
</table>
<script>
var url=window.location.href.split("/").reverse()[1];
var validLinks= ["nrf5","s130","s132","s212","s332"];
var index;
for (index = 0; index < validLinks.length; ++index) {
   if ( url.indexOf(validLinks[index]) !== -1 ) {
      document.getElementById(validLinks[index]).setAttribute('class', 'doclinks docselected');
   };
};
</script>
</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.8.13 -->
<script type="text/javascript">
var searchBox = new SearchBox("searchBox", "search",false,'Search');
</script>
<script type="text/javascript" src="menudata.js"></script>
<script type="text/javascript" src="menu.js"></script>
<script type="text/javascript">
$(function() {
  initMenu('',true,false,'search.php','Search');
  $(document).ready(function() { init_search(); });
});
</script>
<div id="main-nav"></div>
</div><!-- top -->
<div id="side-nav" class="ui-resizable side-nav-resizable">
  <div id="nav-tree">
    <div id="nav-tree-contents">
      <div id="nav-sync" class="sync"></div>
    </div>
  </div>
  <div id="splitbar" style="-moz-user-select:none;" 
       class="ui-resizable-handle">
  </div>
</div>
<script type="text/javascript">
$(document).ready(function(){initNavTree('drv__sx1509__bitfields_8h_source.html','');});
</script>
<div id="doc-content">
<!-- window showing the filter options -->
<div id="MSearchSelectWindow"
     onmouseover="return searchBox.OnSearchSelectShow()"
     onmouseout="return searchBox.OnSearchSelectHide()"
     onkeydown="return searchBox.OnSearchSelectKey(event)">
</div>

<!-- iframe showing the search results (closed by default) -->
<div id="MSearchResultsWindow">
<iframe src="javascript:void(0)" frameborder="0" 
        name="MSearchResults" id="MSearchResults">
</iframe>
</div>

<div class="header">
  <div class="headertitle">
<div class="title">drv_sx1509_bitfields.h</div>  </div>
</div><!--header-->
<div class="contents">
<div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;<span class="comment">/*</span></div><div class="line"><a name="l00002"></a><span class="lineno">    2</span>&#160;<span class="comment">  Copyright (c) 2010 - 2017, Nordic Semiconductor ASA</span></div><div class="line"><a name="l00003"></a><span class="lineno">    3</span>&#160;<span class="comment">  All rights reserved.</span></div><div class="line"><a name="l00004"></a><span class="lineno">    4</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00005"></a><span class="lineno">    5</span>&#160;<span class="comment">  Redistribution and use in source and binary forms, with or without modification,</span></div><div class="line"><a name="l00006"></a><span class="lineno">    6</span>&#160;<span class="comment">  are permitted provided that the following conditions are met:</span></div><div class="line"><a name="l00007"></a><span class="lineno">    7</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00008"></a><span class="lineno">    8</span>&#160;<span class="comment">  1. Redistributions of source code must retain the above copyright notice, this</span></div><div class="line"><a name="l00009"></a><span class="lineno">    9</span>&#160;<span class="comment">     list of conditions and the following disclaimer.</span></div><div class="line"><a name="l00010"></a><span class="lineno">   10</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00011"></a><span class="lineno">   11</span>&#160;<span class="comment">  2. Redistributions in binary form, except as embedded into a Nordic</span></div><div class="line"><a name="l00012"></a><span class="lineno">   12</span>&#160;<span class="comment">     Semiconductor ASA integrated circuit in a product or a software update for</span></div><div class="line"><a name="l00013"></a><span class="lineno">   13</span>&#160;<span class="comment">     such product, must reproduce the above copyright notice, this list of</span></div><div class="line"><a name="l00014"></a><span class="lineno">   14</span>&#160;<span class="comment">     conditions and the following disclaimer in the documentation and/or other</span></div><div class="line"><a name="l00015"></a><span class="lineno">   15</span>&#160;<span class="comment">     materials provided with the distribution.</span></div><div class="line"><a name="l00016"></a><span class="lineno">   16</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00017"></a><span class="lineno">   17</span>&#160;<span class="comment">  3. Neither the name of Nordic Semiconductor ASA nor the names of its</span></div><div class="line"><a name="l00018"></a><span class="lineno">   18</span>&#160;<span class="comment">     contributors may be used to endorse or promote products derived from this</span></div><div class="line"><a name="l00019"></a><span class="lineno">   19</span>&#160;<span class="comment">     software without specific prior written permission.</span></div><div class="line"><a name="l00020"></a><span class="lineno">   20</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00021"></a><span class="lineno">   21</span>&#160;<span class="comment">  4. This software, with or without modification, must only be used with a</span></div><div class="line"><a name="l00022"></a><span class="lineno">   22</span>&#160;<span class="comment">     Nordic Semiconductor ASA integrated circuit.</span></div><div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;<span class="comment">  5. Any software provided in binary form under this license must not be reverse</span></div><div class="line"><a name="l00025"></a><span class="lineno">   25</span>&#160;<span class="comment">     engineered, decompiled, modified and/or disassembled.</span></div><div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;<span class="comment"></span></div><div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;<span class="comment">  THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA &quot;AS IS&quot; AND ANY EXPRESS</span></div><div class="line"><a name="l00028"></a><span class="lineno">   28</span>&#160;<span class="comment">  OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES</span></div><div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;<span class="comment">  OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE</span></div><div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160;<span class="comment">  DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE</span></div><div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;<span class="comment">  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</span></div><div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;<span class="comment">  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE</span></div><div class="line"><a name="l00033"></a><span class="lineno">   33</span>&#160;<span class="comment">  GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)</span></div><div class="line"><a name="l00034"></a><span class="lineno">   34</span>&#160;<span class="comment">  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT</span></div><div class="line"><a name="l00035"></a><span class="lineno">   35</span>&#160;<span class="comment">  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT</span></div><div class="line"><a name="l00036"></a><span class="lineno">   36</span>&#160;<span class="comment">  OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</span></div><div class="line"><a name="l00037"></a><span class="lineno">   37</span>&#160;<span class="comment"> */</span></div><div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;</div><div class="line"><a name="l00039"></a><span class="lineno">   39</span>&#160;<span class="preprocessor">#ifndef DRV_SX1509_BITFIELDS_H__</span></div><div class="line"><a name="l00040"></a><span class="lineno">   40</span>&#160;<span class="preprocessor">#define DRV_SX1509_BITFIELDS_H__</span></div><div class="line"><a name="l00041"></a><span class="lineno">   41</span>&#160;</div><div class="line"><a name="l00042"></a><span class="lineno">   42</span>&#160;<span class="preprocessor">#define DRV_SX1509_FADE_SUPPORTED_PORT_MASK (0xF0F0)</span></div><div class="line"><a name="l00043"></a><span class="lineno">   43</span>&#160;</div><div class="line"><a name="l00044"></a><span class="lineno">   44</span>&#160;<span class="comment">/* Register: INPBUFDISABLE. */</span></div><div class="line"><a name="l00045"></a><span class="lineno">   45</span>&#160;<span class="comment">/* Description: Input buffer disable register. */</span></div><div class="line"><a name="l00046"></a><span class="lineno">   46</span>&#160;</div><div class="line"><a name="l00047"></a><span class="lineno">   47</span>&#160;</div><div class="line"><a name="l00048"></a><span class="lineno">   48</span>&#160;<span class="comment">/* Field INPBUF15: Disables/Enables the input buffer of the I/O pin. */</span></div><div class="line"><a name="l00049"></a><span class="lineno">   49</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF15_Pos      (15)                                           </span></div><div class="line"><a name="l00050"></a><span class="lineno">   50</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF15_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF15_Pos) </span></div><div class="line"><a name="l00051"></a><span class="lineno">   51</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF15_Disabled (0)                                            </span></div><div class="line"><a name="l00052"></a><span class="lineno">   52</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF15_Enabled  (1)                                            </span></div><div class="line"><a name="l00055"></a><span class="lineno">   55</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF14: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00056"></a><span class="lineno">   56</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF14_Pos      (14)                                           </span></div><div class="line"><a name="l00057"></a><span class="lineno">   57</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF14_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF14_Pos) </span></div><div class="line"><a name="l00058"></a><span class="lineno">   58</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF14_Disabled (0)                                            </span></div><div class="line"><a name="l00059"></a><span class="lineno">   59</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF14_Enabled  (1)                                            </span></div><div class="line"><a name="l00062"></a><span class="lineno">   62</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF13: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00063"></a><span class="lineno">   63</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF13_Pos      (13)                                           </span></div><div class="line"><a name="l00064"></a><span class="lineno">   64</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF13_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF13_Pos) </span></div><div class="line"><a name="l00065"></a><span class="lineno">   65</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF13_Disabled (0)                                            </span></div><div class="line"><a name="l00066"></a><span class="lineno">   66</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF13_Enabled  (1)                                            </span></div><div class="line"><a name="l00069"></a><span class="lineno">   69</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF12: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00070"></a><span class="lineno">   70</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF12_Pos      (12)                                           </span></div><div class="line"><a name="l00071"></a><span class="lineno">   71</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF12_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF12_Pos) </span></div><div class="line"><a name="l00072"></a><span class="lineno">   72</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF12_Disabled (0)                                            </span></div><div class="line"><a name="l00073"></a><span class="lineno">   73</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF12_Enabled  (1)                                            </span></div><div class="line"><a name="l00076"></a><span class="lineno">   76</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF11: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00077"></a><span class="lineno">   77</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF11_Pos      (11)                                           </span></div><div class="line"><a name="l00078"></a><span class="lineno">   78</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF11_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF11_Pos) </span></div><div class="line"><a name="l00079"></a><span class="lineno">   79</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF11_Disabled (0)                                            </span></div><div class="line"><a name="l00080"></a><span class="lineno">   80</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF11_Enabled  (1)                                            </span></div><div class="line"><a name="l00083"></a><span class="lineno">   83</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF10: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00084"></a><span class="lineno">   84</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF10_Pos      (10)                                           </span></div><div class="line"><a name="l00085"></a><span class="lineno">   85</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF10_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF10_Pos) </span></div><div class="line"><a name="l00086"></a><span class="lineno">   86</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF10_Disabled (0)                                            </span></div><div class="line"><a name="l00087"></a><span class="lineno">   87</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF10_Enabled  (1)                                            </span></div><div class="line"><a name="l00090"></a><span class="lineno">   90</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF9: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00091"></a><span class="lineno">   91</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF9_Pos      (9)                                           </span></div><div class="line"><a name="l00092"></a><span class="lineno">   92</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF9_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF9_Pos) </span></div><div class="line"><a name="l00093"></a><span class="lineno">   93</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF9_Disabled (0)                                           </span></div><div class="line"><a name="l00094"></a><span class="lineno">   94</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF9_Enabled  (1)                                           </span></div><div class="line"><a name="l00097"></a><span class="lineno">   97</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF8: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00098"></a><span class="lineno">   98</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF8_Pos      (8)                                           </span></div><div class="line"><a name="l00099"></a><span class="lineno">   99</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF8_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF8_Pos) </span></div><div class="line"><a name="l00100"></a><span class="lineno">  100</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF8_Disabled (0)                                           </span></div><div class="line"><a name="l00101"></a><span class="lineno">  101</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF8_Enabled  (1)                                           </span></div><div class="line"><a name="l00104"></a><span class="lineno">  104</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF7: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00105"></a><span class="lineno">  105</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF7_Pos      (7)                                           </span></div><div class="line"><a name="l00106"></a><span class="lineno">  106</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF7_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF7_Pos) </span></div><div class="line"><a name="l00107"></a><span class="lineno">  107</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF7_Disabled (0)                                           </span></div><div class="line"><a name="l00108"></a><span class="lineno">  108</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF7_Enabled  (1)                                           </span></div><div class="line"><a name="l00111"></a><span class="lineno">  111</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF6: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00112"></a><span class="lineno">  112</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF6_Pos      (6)                                           </span></div><div class="line"><a name="l00113"></a><span class="lineno">  113</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF6_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF6_Pos) </span></div><div class="line"><a name="l00114"></a><span class="lineno">  114</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF6_Disabled (0)                                           </span></div><div class="line"><a name="l00115"></a><span class="lineno">  115</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF6_Enabled  (1)                                           </span></div><div class="line"><a name="l00118"></a><span class="lineno">  118</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF5: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00119"></a><span class="lineno">  119</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF5_Pos      (5)                                           </span></div><div class="line"><a name="l00120"></a><span class="lineno">  120</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF5_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF5_Pos) </span></div><div class="line"><a name="l00121"></a><span class="lineno">  121</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF5_Disabled (0)                                           </span></div><div class="line"><a name="l00122"></a><span class="lineno">  122</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF5_Enabled  (1)                                           </span></div><div class="line"><a name="l00125"></a><span class="lineno">  125</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF4: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00126"></a><span class="lineno">  126</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF4_Pos      (4)                                           </span></div><div class="line"><a name="l00127"></a><span class="lineno">  127</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF4_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF4_Pos) </span></div><div class="line"><a name="l00128"></a><span class="lineno">  128</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF4_Disabled (0)                                           </span></div><div class="line"><a name="l00129"></a><span class="lineno">  129</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF4_Enabled  (1)                                           </span></div><div class="line"><a name="l00132"></a><span class="lineno">  132</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF3: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00133"></a><span class="lineno">  133</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF3_Pos      (3)                                           </span></div><div class="line"><a name="l00134"></a><span class="lineno">  134</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF3_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF3_Pos) </span></div><div class="line"><a name="l00135"></a><span class="lineno">  135</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF3_Disabled (0)                                           </span></div><div class="line"><a name="l00136"></a><span class="lineno">  136</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF3_Enabled  (1)                                           </span></div><div class="line"><a name="l00139"></a><span class="lineno">  139</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF2: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00140"></a><span class="lineno">  140</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF2_Pos      (2)                                           </span></div><div class="line"><a name="l00141"></a><span class="lineno">  141</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF2_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF2_Pos) </span></div><div class="line"><a name="l00142"></a><span class="lineno">  142</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF2_Disabled (0)                                           </span></div><div class="line"><a name="l00143"></a><span class="lineno">  143</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF2_Enabled  (1)                                           </span></div><div class="line"><a name="l00146"></a><span class="lineno">  146</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF1: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00147"></a><span class="lineno">  147</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF1_Pos      (1)                                           </span></div><div class="line"><a name="l00148"></a><span class="lineno">  148</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF1_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF1_Pos) </span></div><div class="line"><a name="l00149"></a><span class="lineno">  149</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF1_Disabled (0)                                           </span></div><div class="line"><a name="l00150"></a><span class="lineno">  150</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF1_Enabled  (1)                                           </span></div><div class="line"><a name="l00153"></a><span class="lineno">  153</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field INPBUF0: Disables/Enables the input buffer of the I/O pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00154"></a><span class="lineno">  154</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF0_Pos      (0)                                           </span></div><div class="line"><a name="l00155"></a><span class="lineno">  155</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF0_Msk      (0x1 &lt;&lt; DRV_SX1509_INPBUFDISABLE_INPBUF0_Pos) </span></div><div class="line"><a name="l00156"></a><span class="lineno">  156</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF0_Disabled (0)                                           </span></div><div class="line"><a name="l00157"></a><span class="lineno">  157</span>&#160;<span class="preprocessor">#define DRV_SX1509_INPBUFDISABLE_INPBUF0_Enabled  (1)                                           </span></div><div class="line"><a name="l00160"></a><span class="lineno">  160</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: LONGSLEWRATE. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00161"></a><span class="lineno">  161</span>&#160;<span class="comment">/* Description: Output buffer long slew register. */</span></div><div class="line"><a name="l00162"></a><span class="lineno">  162</span>&#160;</div><div class="line"><a name="l00163"></a><span class="lineno">  163</span>&#160;</div><div class="line"><a name="l00164"></a><span class="lineno">  164</span>&#160;<span class="comment">/* Field PIN15: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span></div><div class="line"><a name="l00165"></a><span class="lineno">  165</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN15_Pos      (15)                                       </span></div><div class="line"><a name="l00166"></a><span class="lineno">  166</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN15_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN15_Pos) </span></div><div class="line"><a name="l00167"></a><span class="lineno">  167</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN15_Disabled (0)                                        </span></div><div class="line"><a name="l00168"></a><span class="lineno">  168</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN15_Enabled  (1)                                        </span></div><div class="line"><a name="l00171"></a><span class="lineno">  171</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00172"></a><span class="lineno">  172</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN14_Pos      (14)                                       </span></div><div class="line"><a name="l00173"></a><span class="lineno">  173</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN14_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN14_Pos) </span></div><div class="line"><a name="l00174"></a><span class="lineno">  174</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN14_Disabled (0)                                        </span></div><div class="line"><a name="l00175"></a><span class="lineno">  175</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN14_Enabled  (1)                                        </span></div><div class="line"><a name="l00178"></a><span class="lineno">  178</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00179"></a><span class="lineno">  179</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN13_Pos      (13)                                       </span></div><div class="line"><a name="l00180"></a><span class="lineno">  180</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN13_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN13_Pos) </span></div><div class="line"><a name="l00181"></a><span class="lineno">  181</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN13_Disabled (0)                                        </span></div><div class="line"><a name="l00182"></a><span class="lineno">  182</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN13_Enabled  (1)                                        </span></div><div class="line"><a name="l00185"></a><span class="lineno">  185</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00186"></a><span class="lineno">  186</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN12_Pos      (12)                                       </span></div><div class="line"><a name="l00187"></a><span class="lineno">  187</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN12_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN12_Pos) </span></div><div class="line"><a name="l00188"></a><span class="lineno">  188</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN12_Disabled (0)                                        </span></div><div class="line"><a name="l00189"></a><span class="lineno">  189</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN12_Enabled  (1)                                        </span></div><div class="line"><a name="l00192"></a><span class="lineno">  192</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00193"></a><span class="lineno">  193</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN11_Pos      (11)                                       </span></div><div class="line"><a name="l00194"></a><span class="lineno">  194</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN11_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN11_Pos) </span></div><div class="line"><a name="l00195"></a><span class="lineno">  195</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN11_Disabled (0)                                        </span></div><div class="line"><a name="l00196"></a><span class="lineno">  196</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN11_Enabled  (1)                                        </span></div><div class="line"><a name="l00199"></a><span class="lineno">  199</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00200"></a><span class="lineno">  200</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN10_Pos      (10)                                       </span></div><div class="line"><a name="l00201"></a><span class="lineno">  201</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN10_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN10_Pos) </span></div><div class="line"><a name="l00202"></a><span class="lineno">  202</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN10_Disabled (0)                                        </span></div><div class="line"><a name="l00203"></a><span class="lineno">  203</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN10_Enabled  (1)                                        </span></div><div class="line"><a name="l00206"></a><span class="lineno">  206</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00207"></a><span class="lineno">  207</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN9_Pos      (9)                                       </span></div><div class="line"><a name="l00208"></a><span class="lineno">  208</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN9_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN9_Pos) </span></div><div class="line"><a name="l00209"></a><span class="lineno">  209</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN9_Disabled (0)                                       </span></div><div class="line"><a name="l00210"></a><span class="lineno">  210</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN9_Enabled  (1)                                       </span></div><div class="line"><a name="l00213"></a><span class="lineno">  213</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00214"></a><span class="lineno">  214</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN8_Pos      (8)                                       </span></div><div class="line"><a name="l00215"></a><span class="lineno">  215</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN8_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN8_Pos) </span></div><div class="line"><a name="l00216"></a><span class="lineno">  216</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN8_Disabled (0)                                       </span></div><div class="line"><a name="l00217"></a><span class="lineno">  217</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN8_Enabled  (1)                                       </span></div><div class="line"><a name="l00220"></a><span class="lineno">  220</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00221"></a><span class="lineno">  221</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN7_Pos      (7)                                       </span></div><div class="line"><a name="l00222"></a><span class="lineno">  222</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN7_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN7_Pos) </span></div><div class="line"><a name="l00223"></a><span class="lineno">  223</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN7_Disabled (0)                                       </span></div><div class="line"><a name="l00224"></a><span class="lineno">  224</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN7_Enabled  (1)                                       </span></div><div class="line"><a name="l00227"></a><span class="lineno">  227</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00228"></a><span class="lineno">  228</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN6_Pos      (6)                                       </span></div><div class="line"><a name="l00229"></a><span class="lineno">  229</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN6_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN6_Pos) </span></div><div class="line"><a name="l00230"></a><span class="lineno">  230</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN6_Disabled (0)                                       </span></div><div class="line"><a name="l00231"></a><span class="lineno">  231</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN6_Enabled  (1)                                       </span></div><div class="line"><a name="l00234"></a><span class="lineno">  234</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00235"></a><span class="lineno">  235</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN5_Pos      (5)                                       </span></div><div class="line"><a name="l00236"></a><span class="lineno">  236</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN5_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN5_Pos) </span></div><div class="line"><a name="l00237"></a><span class="lineno">  237</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN5_Disabled (0)                                       </span></div><div class="line"><a name="l00238"></a><span class="lineno">  238</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN5_Enabled  (1)                                       </span></div><div class="line"><a name="l00241"></a><span class="lineno">  241</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00242"></a><span class="lineno">  242</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN4_Pos      (4)                                       </span></div><div class="line"><a name="l00243"></a><span class="lineno">  243</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN4_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN4_Pos) </span></div><div class="line"><a name="l00244"></a><span class="lineno">  244</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN4_Disabled (0)                                       </span></div><div class="line"><a name="l00245"></a><span class="lineno">  245</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN4_Enabled  (1)                                       </span></div><div class="line"><a name="l00248"></a><span class="lineno">  248</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00249"></a><span class="lineno">  249</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN3_Pos      (3)                                       </span></div><div class="line"><a name="l00250"></a><span class="lineno">  250</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN3_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN3_Pos) </span></div><div class="line"><a name="l00251"></a><span class="lineno">  251</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN3_Disabled (0)                                       </span></div><div class="line"><a name="l00252"></a><span class="lineno">  252</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN3_Enabled  (1)                                       </span></div><div class="line"><a name="l00255"></a><span class="lineno">  255</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00256"></a><span class="lineno">  256</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN2_Pos      (2)                                       </span></div><div class="line"><a name="l00257"></a><span class="lineno">  257</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN2_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN2_Pos) </span></div><div class="line"><a name="l00258"></a><span class="lineno">  258</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN2_Disabled (0)                                       </span></div><div class="line"><a name="l00259"></a><span class="lineno">  259</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN2_Enabled  (1)                                       </span></div><div class="line"><a name="l00262"></a><span class="lineno">  262</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00263"></a><span class="lineno">  263</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN1_Pos      (1)                                       </span></div><div class="line"><a name="l00264"></a><span class="lineno">  264</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN1_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN1_Pos) </span></div><div class="line"><a name="l00265"></a><span class="lineno">  265</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN1_Disabled (0)                                       </span></div><div class="line"><a name="l00266"></a><span class="lineno">  266</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN1_Enabled  (1)                                       </span></div><div class="line"><a name="l00269"></a><span class="lineno">  269</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Enables/Disables increased slew rate of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00270"></a><span class="lineno">  270</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN0_Pos      (0)                                       </span></div><div class="line"><a name="l00271"></a><span class="lineno">  271</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN0_Msk      (0x1 &lt;&lt; DRV_SX1509_LONGSLEWRATE_PIN0_Pos) </span></div><div class="line"><a name="l00272"></a><span class="lineno">  272</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN0_Disabled (0)                                       </span></div><div class="line"><a name="l00273"></a><span class="lineno">  273</span>&#160;<span class="preprocessor">#define DRV_SX1509_LONGSLEWRATE_PIN0_Enabled  (1)                                       </span></div><div class="line"><a name="l00276"></a><span class="lineno">  276</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: LOWDRIVE. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00277"></a><span class="lineno">  277</span>&#160;<span class="comment">/* Description: Output buffer low drive register. */</span></div><div class="line"><a name="l00278"></a><span class="lineno">  278</span>&#160;</div><div class="line"><a name="l00279"></a><span class="lineno">  279</span>&#160;</div><div class="line"><a name="l00280"></a><span class="lineno">  280</span>&#160;<span class="comment">/* Field PIN15: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span></div><div class="line"><a name="l00281"></a><span class="lineno">  281</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN15_Pos      (15)                                   </span></div><div class="line"><a name="l00282"></a><span class="lineno">  282</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN15_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN15_Pos) </span></div><div class="line"><a name="l00283"></a><span class="lineno">  283</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN15_Disabled (0)                                    </span></div><div class="line"><a name="l00284"></a><span class="lineno">  284</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN15_Enabled  (1)                                    </span></div><div class="line"><a name="l00287"></a><span class="lineno">  287</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00288"></a><span class="lineno">  288</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN14_Pos      (14)                                   </span></div><div class="line"><a name="l00289"></a><span class="lineno">  289</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN14_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN14_Pos) </span></div><div class="line"><a name="l00290"></a><span class="lineno">  290</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN14_Disabled (0)                                    </span></div><div class="line"><a name="l00291"></a><span class="lineno">  291</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN14_Enabled  (1)                                    </span></div><div class="line"><a name="l00294"></a><span class="lineno">  294</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00295"></a><span class="lineno">  295</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN13_Pos      (13)                                   </span></div><div class="line"><a name="l00296"></a><span class="lineno">  296</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN13_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN13_Pos) </span></div><div class="line"><a name="l00297"></a><span class="lineno">  297</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN13_Disabled (0)                                    </span></div><div class="line"><a name="l00298"></a><span class="lineno">  298</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN13_Enabled  (1)                                    </span></div><div class="line"><a name="l00301"></a><span class="lineno">  301</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00302"></a><span class="lineno">  302</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN12_Pos      (12)                                   </span></div><div class="line"><a name="l00303"></a><span class="lineno">  303</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN12_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN12_Pos) </span></div><div class="line"><a name="l00304"></a><span class="lineno">  304</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN12_Disabled (0)                                    </span></div><div class="line"><a name="l00305"></a><span class="lineno">  305</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN12_Enabled  (1)                                    </span></div><div class="line"><a name="l00308"></a><span class="lineno">  308</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00309"></a><span class="lineno">  309</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN11_Pos      (11)                                   </span></div><div class="line"><a name="l00310"></a><span class="lineno">  310</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN11_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN11_Pos) </span></div><div class="line"><a name="l00311"></a><span class="lineno">  311</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN11_Disabled (0)                                    </span></div><div class="line"><a name="l00312"></a><span class="lineno">  312</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN11_Enabled  (1)                                    </span></div><div class="line"><a name="l00315"></a><span class="lineno">  315</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00316"></a><span class="lineno">  316</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN10_Pos      (10)                                   </span></div><div class="line"><a name="l00317"></a><span class="lineno">  317</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN10_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN10_Pos) </span></div><div class="line"><a name="l00318"></a><span class="lineno">  318</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN10_Disabled (0)                                    </span></div><div class="line"><a name="l00319"></a><span class="lineno">  319</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN10_Enabled  (1)                                    </span></div><div class="line"><a name="l00322"></a><span class="lineno">  322</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00323"></a><span class="lineno">  323</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN9_Pos      (9)                                   </span></div><div class="line"><a name="l00324"></a><span class="lineno">  324</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN9_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN9_Pos) </span></div><div class="line"><a name="l00325"></a><span class="lineno">  325</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN9_Disabled (0)                                   </span></div><div class="line"><a name="l00326"></a><span class="lineno">  326</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN9_Enabled  (1)                                   </span></div><div class="line"><a name="l00329"></a><span class="lineno">  329</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00330"></a><span class="lineno">  330</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN8_Pos      (8)                                   </span></div><div class="line"><a name="l00331"></a><span class="lineno">  331</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN8_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN8_Pos) </span></div><div class="line"><a name="l00332"></a><span class="lineno">  332</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN8_Disabled (0)                                   </span></div><div class="line"><a name="l00333"></a><span class="lineno">  333</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN8_Enabled  (1)                                   </span></div><div class="line"><a name="l00336"></a><span class="lineno">  336</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00337"></a><span class="lineno">  337</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN7_Pos      (7)                                   </span></div><div class="line"><a name="l00338"></a><span class="lineno">  338</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN7_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN7_Pos) </span></div><div class="line"><a name="l00339"></a><span class="lineno">  339</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN7_Disabled (0)                                   </span></div><div class="line"><a name="l00340"></a><span class="lineno">  340</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN7_Enabled  (1)                                   </span></div><div class="line"><a name="l00343"></a><span class="lineno">  343</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00344"></a><span class="lineno">  344</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN6_Pos      (6)                                   </span></div><div class="line"><a name="l00345"></a><span class="lineno">  345</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN6_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN6_Pos) </span></div><div class="line"><a name="l00346"></a><span class="lineno">  346</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN6_Disabled (0)                                   </span></div><div class="line"><a name="l00347"></a><span class="lineno">  347</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN6_Enabled  (1)                                   </span></div><div class="line"><a name="l00350"></a><span class="lineno">  350</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00351"></a><span class="lineno">  351</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN5_Pos      (5)                                   </span></div><div class="line"><a name="l00352"></a><span class="lineno">  352</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN5_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN5_Pos) </span></div><div class="line"><a name="l00353"></a><span class="lineno">  353</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN5_Disabled (0)                                   </span></div><div class="line"><a name="l00354"></a><span class="lineno">  354</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN5_Enabled  (1)                                   </span></div><div class="line"><a name="l00357"></a><span class="lineno">  357</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00358"></a><span class="lineno">  358</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN4_Pos      (4)                                   </span></div><div class="line"><a name="l00359"></a><span class="lineno">  359</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN4_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN4_Pos) </span></div><div class="line"><a name="l00360"></a><span class="lineno">  360</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN4_Disabled (0)                                   </span></div><div class="line"><a name="l00361"></a><span class="lineno">  361</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN4_Enabled  (1)                                   </span></div><div class="line"><a name="l00364"></a><span class="lineno">  364</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00365"></a><span class="lineno">  365</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN3_Pos      (3)                                   </span></div><div class="line"><a name="l00366"></a><span class="lineno">  366</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN3_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN3_Pos) </span></div><div class="line"><a name="l00367"></a><span class="lineno">  367</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN3_Disabled (0)                                   </span></div><div class="line"><a name="l00368"></a><span class="lineno">  368</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN3_Enabled  (1)                                   </span></div><div class="line"><a name="l00371"></a><span class="lineno">  371</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00372"></a><span class="lineno">  372</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN2_Pos      (2)                                   </span></div><div class="line"><a name="l00373"></a><span class="lineno">  373</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN2_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN2_Pos) </span></div><div class="line"><a name="l00374"></a><span class="lineno">  374</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN2_Disabled (0)                                   </span></div><div class="line"><a name="l00375"></a><span class="lineno">  375</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN2_Enabled  (1)                                   </span></div><div class="line"><a name="l00378"></a><span class="lineno">  378</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00379"></a><span class="lineno">  379</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN1_Pos      (1)                                   </span></div><div class="line"><a name="l00380"></a><span class="lineno">  380</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN1_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN1_Pos) </span></div><div class="line"><a name="l00381"></a><span class="lineno">  381</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN1_Disabled (0)                                   </span></div><div class="line"><a name="l00382"></a><span class="lineno">  382</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN1_Enabled  (1)                                   </span></div><div class="line"><a name="l00385"></a><span class="lineno">  385</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Enables/Disables reduced drive of the output buffer of each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00386"></a><span class="lineno">  386</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN0_Pos      (0)                                   </span></div><div class="line"><a name="l00387"></a><span class="lineno">  387</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN0_Msk      (0x1 &lt;&lt; DRV_SX1509_LOWDRIVE_PIN0_Pos) </span></div><div class="line"><a name="l00388"></a><span class="lineno">  388</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN0_Disabled (0)                                   </span></div><div class="line"><a name="l00389"></a><span class="lineno">  389</span>&#160;<span class="preprocessor">#define DRV_SX1509_LOWDRIVE_PIN0_Enabled  (1)                                   </span></div><div class="line"><a name="l00392"></a><span class="lineno">  392</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: PULLUP. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00393"></a><span class="lineno">  393</span>&#160;<span class="comment">/* Description: Pull-up register. */</span></div><div class="line"><a name="l00394"></a><span class="lineno">  394</span>&#160;</div><div class="line"><a name="l00395"></a><span class="lineno">  395</span>&#160;</div><div class="line"><a name="l00396"></a><span class="lineno">  396</span>&#160;<span class="comment">/* Field PIN15: Enables/Disables the pull-up for each IO. */</span></div><div class="line"><a name="l00397"></a><span class="lineno">  397</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN15_Pos      (15)                                 </span></div><div class="line"><a name="l00398"></a><span class="lineno">  398</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN15_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN15_Pos) </span></div><div class="line"><a name="l00399"></a><span class="lineno">  399</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN15_Disabled (0)                                  </span></div><div class="line"><a name="l00400"></a><span class="lineno">  400</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN15_Enabled  (1)                                  </span></div><div class="line"><a name="l00403"></a><span class="lineno">  403</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00404"></a><span class="lineno">  404</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN14_Pos      (14)                                 </span></div><div class="line"><a name="l00405"></a><span class="lineno">  405</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN14_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN14_Pos) </span></div><div class="line"><a name="l00406"></a><span class="lineno">  406</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN14_Disabled (0)                                  </span></div><div class="line"><a name="l00407"></a><span class="lineno">  407</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN14_Enabled  (1)                                  </span></div><div class="line"><a name="l00410"></a><span class="lineno">  410</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00411"></a><span class="lineno">  411</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN13_Pos      (13)                                 </span></div><div class="line"><a name="l00412"></a><span class="lineno">  412</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN13_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN13_Pos) </span></div><div class="line"><a name="l00413"></a><span class="lineno">  413</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN13_Disabled (0)                                  </span></div><div class="line"><a name="l00414"></a><span class="lineno">  414</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN13_Enabled  (1)                                  </span></div><div class="line"><a name="l00417"></a><span class="lineno">  417</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00418"></a><span class="lineno">  418</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN12_Pos      (12)                                 </span></div><div class="line"><a name="l00419"></a><span class="lineno">  419</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN12_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN12_Pos) </span></div><div class="line"><a name="l00420"></a><span class="lineno">  420</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN12_Disabled (0)                                  </span></div><div class="line"><a name="l00421"></a><span class="lineno">  421</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN12_Enabled  (1)                                  </span></div><div class="line"><a name="l00424"></a><span class="lineno">  424</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00425"></a><span class="lineno">  425</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN11_Pos      (11)                                 </span></div><div class="line"><a name="l00426"></a><span class="lineno">  426</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN11_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN11_Pos) </span></div><div class="line"><a name="l00427"></a><span class="lineno">  427</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN11_Disabled (0)                                  </span></div><div class="line"><a name="l00428"></a><span class="lineno">  428</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN11_Enabled  (1)                                  </span></div><div class="line"><a name="l00431"></a><span class="lineno">  431</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00432"></a><span class="lineno">  432</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN10_Pos      (10)                                 </span></div><div class="line"><a name="l00433"></a><span class="lineno">  433</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN10_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN10_Pos) </span></div><div class="line"><a name="l00434"></a><span class="lineno">  434</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN10_Disabled (0)                                  </span></div><div class="line"><a name="l00435"></a><span class="lineno">  435</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN10_Enabled  (1)                                  </span></div><div class="line"><a name="l00438"></a><span class="lineno">  438</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00439"></a><span class="lineno">  439</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN9_Pos      (9)                                 </span></div><div class="line"><a name="l00440"></a><span class="lineno">  440</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN9_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN9_Pos) </span></div><div class="line"><a name="l00441"></a><span class="lineno">  441</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN9_Disabled (0)                                 </span></div><div class="line"><a name="l00442"></a><span class="lineno">  442</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN9_Enabled  (1)                                 </span></div><div class="line"><a name="l00445"></a><span class="lineno">  445</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00446"></a><span class="lineno">  446</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN8_Pos      (8)                                 </span></div><div class="line"><a name="l00447"></a><span class="lineno">  447</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN8_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN8_Pos) </span></div><div class="line"><a name="l00448"></a><span class="lineno">  448</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN8_Disabled (0)                                 </span></div><div class="line"><a name="l00449"></a><span class="lineno">  449</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN8_Enabled  (1)                                 </span></div><div class="line"><a name="l00452"></a><span class="lineno">  452</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00453"></a><span class="lineno">  453</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN7_Pos      (7)                                 </span></div><div class="line"><a name="l00454"></a><span class="lineno">  454</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN7_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN7_Pos) </span></div><div class="line"><a name="l00455"></a><span class="lineno">  455</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN7_Disabled (0)                                 </span></div><div class="line"><a name="l00456"></a><span class="lineno">  456</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN7_Enabled  (1)                                 </span></div><div class="line"><a name="l00459"></a><span class="lineno">  459</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00460"></a><span class="lineno">  460</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN6_Pos      (6)                                 </span></div><div class="line"><a name="l00461"></a><span class="lineno">  461</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN6_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN6_Pos) </span></div><div class="line"><a name="l00462"></a><span class="lineno">  462</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN6_Disabled (0)                                 </span></div><div class="line"><a name="l00463"></a><span class="lineno">  463</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN6_Enabled  (1)                                 </span></div><div class="line"><a name="l00466"></a><span class="lineno">  466</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00467"></a><span class="lineno">  467</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN5_Pos      (5)                                 </span></div><div class="line"><a name="l00468"></a><span class="lineno">  468</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN5_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN5_Pos) </span></div><div class="line"><a name="l00469"></a><span class="lineno">  469</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN5_Disabled (0)                                 </span></div><div class="line"><a name="l00470"></a><span class="lineno">  470</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN5_Enabled  (1)                                 </span></div><div class="line"><a name="l00473"></a><span class="lineno">  473</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00474"></a><span class="lineno">  474</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN4_Pos      (4)                                 </span></div><div class="line"><a name="l00475"></a><span class="lineno">  475</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN4_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN4_Pos) </span></div><div class="line"><a name="l00476"></a><span class="lineno">  476</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN4_Disabled (0)                                 </span></div><div class="line"><a name="l00477"></a><span class="lineno">  477</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN4_Enabled  (1)                                 </span></div><div class="line"><a name="l00480"></a><span class="lineno">  480</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00481"></a><span class="lineno">  481</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN3_Pos      (3)                                 </span></div><div class="line"><a name="l00482"></a><span class="lineno">  482</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN3_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN3_Pos) </span></div><div class="line"><a name="l00483"></a><span class="lineno">  483</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN3_Disabled (0)                                 </span></div><div class="line"><a name="l00484"></a><span class="lineno">  484</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN3_Enabled  (1)                                 </span></div><div class="line"><a name="l00487"></a><span class="lineno">  487</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00488"></a><span class="lineno">  488</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN2_Pos      (2)                                 </span></div><div class="line"><a name="l00489"></a><span class="lineno">  489</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN2_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN2_Pos) </span></div><div class="line"><a name="l00490"></a><span class="lineno">  490</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN2_Disabled (0)                                 </span></div><div class="line"><a name="l00491"></a><span class="lineno">  491</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN2_Enabled  (1)                                 </span></div><div class="line"><a name="l00494"></a><span class="lineno">  494</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00495"></a><span class="lineno">  495</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN1_Pos      (1)                                 </span></div><div class="line"><a name="l00496"></a><span class="lineno">  496</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN1_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN1_Pos) </span></div><div class="line"><a name="l00497"></a><span class="lineno">  497</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN1_Disabled (0)                                 </span></div><div class="line"><a name="l00498"></a><span class="lineno">  498</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN1_Enabled  (1)                                 </span></div><div class="line"><a name="l00501"></a><span class="lineno">  501</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Enables/Disables the pull-up for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00502"></a><span class="lineno">  502</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN0_Pos      (0)                                 </span></div><div class="line"><a name="l00503"></a><span class="lineno">  503</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN0_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLUP_PIN0_Pos) </span></div><div class="line"><a name="l00504"></a><span class="lineno">  504</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN0_Disabled (0)                                 </span></div><div class="line"><a name="l00505"></a><span class="lineno">  505</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLUP_PIN0_Enabled  (1)                                 </span></div><div class="line"><a name="l00508"></a><span class="lineno">  508</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: PULLDOWN. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00509"></a><span class="lineno">  509</span>&#160;<span class="comment">/* Description: Pull-down register. */</span></div><div class="line"><a name="l00510"></a><span class="lineno">  510</span>&#160;</div><div class="line"><a name="l00511"></a><span class="lineno">  511</span>&#160;</div><div class="line"><a name="l00512"></a><span class="lineno">  512</span>&#160;<span class="comment">/* Field PIN15: Enables/Disables pull-down for each IO. */</span></div><div class="line"><a name="l00513"></a><span class="lineno">  513</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN15_Pos      (15)                                   </span></div><div class="line"><a name="l00514"></a><span class="lineno">  514</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN15_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN15_Pos) </span></div><div class="line"><a name="l00515"></a><span class="lineno">  515</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN15_Disabled (0)                                    </span></div><div class="line"><a name="l00516"></a><span class="lineno">  516</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN15_Enabled  (1)                                    </span></div><div class="line"><a name="l00519"></a><span class="lineno">  519</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00520"></a><span class="lineno">  520</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN14_Pos      (14)                                   </span></div><div class="line"><a name="l00521"></a><span class="lineno">  521</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN14_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN14_Pos) </span></div><div class="line"><a name="l00522"></a><span class="lineno">  522</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN14_Disabled (0)                                    </span></div><div class="line"><a name="l00523"></a><span class="lineno">  523</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN14_Enabled  (1)                                    </span></div><div class="line"><a name="l00526"></a><span class="lineno">  526</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00527"></a><span class="lineno">  527</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN13_Pos      (13)                                   </span></div><div class="line"><a name="l00528"></a><span class="lineno">  528</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN13_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN13_Pos) </span></div><div class="line"><a name="l00529"></a><span class="lineno">  529</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN13_Disabled (0)                                    </span></div><div class="line"><a name="l00530"></a><span class="lineno">  530</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN13_Enabled  (1)                                    </span></div><div class="line"><a name="l00533"></a><span class="lineno">  533</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00534"></a><span class="lineno">  534</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN12_Pos      (12)                                   </span></div><div class="line"><a name="l00535"></a><span class="lineno">  535</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN12_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN12_Pos) </span></div><div class="line"><a name="l00536"></a><span class="lineno">  536</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN12_Disabled (0)                                    </span></div><div class="line"><a name="l00537"></a><span class="lineno">  537</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN12_Enabled  (1)                                    </span></div><div class="line"><a name="l00540"></a><span class="lineno">  540</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00541"></a><span class="lineno">  541</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN11_Pos      (11)                                   </span></div><div class="line"><a name="l00542"></a><span class="lineno">  542</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN11_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN11_Pos) </span></div><div class="line"><a name="l00543"></a><span class="lineno">  543</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN11_Disabled (0)                                    </span></div><div class="line"><a name="l00544"></a><span class="lineno">  544</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN11_Enabled  (1)                                    </span></div><div class="line"><a name="l00547"></a><span class="lineno">  547</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00548"></a><span class="lineno">  548</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN10_Pos      (10)                                   </span></div><div class="line"><a name="l00549"></a><span class="lineno">  549</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN10_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN10_Pos) </span></div><div class="line"><a name="l00550"></a><span class="lineno">  550</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN10_Disabled (0)                                    </span></div><div class="line"><a name="l00551"></a><span class="lineno">  551</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN10_Enabled  (1)                                    </span></div><div class="line"><a name="l00554"></a><span class="lineno">  554</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00555"></a><span class="lineno">  555</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN9_Pos      (9)                                   </span></div><div class="line"><a name="l00556"></a><span class="lineno">  556</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN9_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN9_Pos) </span></div><div class="line"><a name="l00557"></a><span class="lineno">  557</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN9_Disabled (0)                                   </span></div><div class="line"><a name="l00558"></a><span class="lineno">  558</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN9_Enabled  (1)                                   </span></div><div class="line"><a name="l00561"></a><span class="lineno">  561</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00562"></a><span class="lineno">  562</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN8_Pos      (8)                                   </span></div><div class="line"><a name="l00563"></a><span class="lineno">  563</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN8_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN8_Pos) </span></div><div class="line"><a name="l00564"></a><span class="lineno">  564</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN8_Disabled (0)                                   </span></div><div class="line"><a name="l00565"></a><span class="lineno">  565</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN8_Enabled  (1)                                   </span></div><div class="line"><a name="l00568"></a><span class="lineno">  568</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00569"></a><span class="lineno">  569</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN7_Pos      (7)                                   </span></div><div class="line"><a name="l00570"></a><span class="lineno">  570</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN7_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN7_Pos) </span></div><div class="line"><a name="l00571"></a><span class="lineno">  571</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN7_Disabled (0)                                   </span></div><div class="line"><a name="l00572"></a><span class="lineno">  572</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN7_Enabled  (1)                                   </span></div><div class="line"><a name="l00575"></a><span class="lineno">  575</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00576"></a><span class="lineno">  576</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN6_Pos      (6)                                   </span></div><div class="line"><a name="l00577"></a><span class="lineno">  577</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN6_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN6_Pos) </span></div><div class="line"><a name="l00578"></a><span class="lineno">  578</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN6_Disabled (0)                                   </span></div><div class="line"><a name="l00579"></a><span class="lineno">  579</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN6_Enabled  (1)                                   </span></div><div class="line"><a name="l00582"></a><span class="lineno">  582</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00583"></a><span class="lineno">  583</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN5_Pos      (5)                                   </span></div><div class="line"><a name="l00584"></a><span class="lineno">  584</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN5_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN5_Pos) </span></div><div class="line"><a name="l00585"></a><span class="lineno">  585</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN5_Disabled (0)                                   </span></div><div class="line"><a name="l00586"></a><span class="lineno">  586</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN5_Enabled  (1)                                   </span></div><div class="line"><a name="l00589"></a><span class="lineno">  589</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00590"></a><span class="lineno">  590</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN4_Pos      (4)                                   </span></div><div class="line"><a name="l00591"></a><span class="lineno">  591</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN4_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN4_Pos) </span></div><div class="line"><a name="l00592"></a><span class="lineno">  592</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN4_Disabled (0)                                   </span></div><div class="line"><a name="l00593"></a><span class="lineno">  593</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN4_Enabled  (1)                                   </span></div><div class="line"><a name="l00596"></a><span class="lineno">  596</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00597"></a><span class="lineno">  597</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN3_Pos      (3)                                   </span></div><div class="line"><a name="l00598"></a><span class="lineno">  598</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN3_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN3_Pos) </span></div><div class="line"><a name="l00599"></a><span class="lineno">  599</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN3_Disabled (0)                                   </span></div><div class="line"><a name="l00600"></a><span class="lineno">  600</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN3_Enabled  (1)                                   </span></div><div class="line"><a name="l00603"></a><span class="lineno">  603</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00604"></a><span class="lineno">  604</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN2_Pos      (2)                                   </span></div><div class="line"><a name="l00605"></a><span class="lineno">  605</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN2_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN2_Pos) </span></div><div class="line"><a name="l00606"></a><span class="lineno">  606</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN2_Disabled (0)                                   </span></div><div class="line"><a name="l00607"></a><span class="lineno">  607</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN2_Enabled  (1)                                   </span></div><div class="line"><a name="l00610"></a><span class="lineno">  610</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00611"></a><span class="lineno">  611</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN1_Pos      (1)                                   </span></div><div class="line"><a name="l00612"></a><span class="lineno">  612</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN1_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN1_Pos) </span></div><div class="line"><a name="l00613"></a><span class="lineno">  613</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN1_Disabled (0)                                   </span></div><div class="line"><a name="l00614"></a><span class="lineno">  614</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN1_Enabled  (1)                                   </span></div><div class="line"><a name="l00617"></a><span class="lineno">  617</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Enables/Disables pull-down for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00618"></a><span class="lineno">  618</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN0_Pos      (0)                                   </span></div><div class="line"><a name="l00619"></a><span class="lineno">  619</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN0_Msk      (0x1 &lt;&lt; DRV_SX1509_PULLDOWN_PIN0_Pos) </span></div><div class="line"><a name="l00620"></a><span class="lineno">  620</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN0_Disabled (0)                                   </span></div><div class="line"><a name="l00621"></a><span class="lineno">  621</span>&#160;<span class="preprocessor">#define DRV_SX1509_PULLDOWN_PIN0_Enabled  (1)                                   </span></div><div class="line"><a name="l00624"></a><span class="lineno">  624</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: OPENDRAIN. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00625"></a><span class="lineno">  625</span>&#160;<span class="comment">/* Description: Enables/Disables open drain operation for each [output-configured] IO. */</span></div><div class="line"><a name="l00626"></a><span class="lineno">  626</span>&#160;</div><div class="line"><a name="l00627"></a><span class="lineno">  627</span>&#160;</div><div class="line"><a name="l00628"></a><span class="lineno">  628</span>&#160;<span class="comment">/* Field PIN15: Enables/Disables open drain operation for each [output-configured] IO. */</span></div><div class="line"><a name="l00629"></a><span class="lineno">  629</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN15_Pos       (15)                                    </span></div><div class="line"><a name="l00630"></a><span class="lineno">  630</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN15_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN15_Pos) </span></div><div class="line"><a name="l00631"></a><span class="lineno">  631</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN15_PushPull  (0)                                     </span></div><div class="line"><a name="l00632"></a><span class="lineno">  632</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN15_OpenDrain (1)                                     </span></div><div class="line"><a name="l00635"></a><span class="lineno">  635</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00636"></a><span class="lineno">  636</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN14_Pos       (14)                                    </span></div><div class="line"><a name="l00637"></a><span class="lineno">  637</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN14_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN14_Pos) </span></div><div class="line"><a name="l00638"></a><span class="lineno">  638</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN14_PushPull  (0)                                     </span></div><div class="line"><a name="l00639"></a><span class="lineno">  639</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN14_OpenDrain (1)                                     </span></div><div class="line"><a name="l00642"></a><span class="lineno">  642</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00643"></a><span class="lineno">  643</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN13_Pos       (13)                                    </span></div><div class="line"><a name="l00644"></a><span class="lineno">  644</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN13_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN13_Pos) </span></div><div class="line"><a name="l00645"></a><span class="lineno">  645</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN13_PushPull  (0)                                     </span></div><div class="line"><a name="l00646"></a><span class="lineno">  646</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN13_OpenDrain (1)                                     </span></div><div class="line"><a name="l00649"></a><span class="lineno">  649</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00650"></a><span class="lineno">  650</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN12_Pos       (12)                                    </span></div><div class="line"><a name="l00651"></a><span class="lineno">  651</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN12_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN12_Pos) </span></div><div class="line"><a name="l00652"></a><span class="lineno">  652</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN12_PushPull  (0)                                     </span></div><div class="line"><a name="l00653"></a><span class="lineno">  653</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN12_OpenDrain (1)                                     </span></div><div class="line"><a name="l00656"></a><span class="lineno">  656</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00657"></a><span class="lineno">  657</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN11_Pos       (11)                                    </span></div><div class="line"><a name="l00658"></a><span class="lineno">  658</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN11_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN11_Pos) </span></div><div class="line"><a name="l00659"></a><span class="lineno">  659</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN11_PushPull  (0)                                     </span></div><div class="line"><a name="l00660"></a><span class="lineno">  660</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN11_OpenDrain (1)                                     </span></div><div class="line"><a name="l00663"></a><span class="lineno">  663</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00664"></a><span class="lineno">  664</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN10_Pos       (10)                                    </span></div><div class="line"><a name="l00665"></a><span class="lineno">  665</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN10_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN10_Pos) </span></div><div class="line"><a name="l00666"></a><span class="lineno">  666</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN10_PushPull  (0)                                     </span></div><div class="line"><a name="l00667"></a><span class="lineno">  667</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN10_OpenDrain (1)                                     </span></div><div class="line"><a name="l00670"></a><span class="lineno">  670</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00671"></a><span class="lineno">  671</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN9_Pos       (9)                                    </span></div><div class="line"><a name="l00672"></a><span class="lineno">  672</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN9_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN9_Pos) </span></div><div class="line"><a name="l00673"></a><span class="lineno">  673</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN9_PushPull  (0)                                    </span></div><div class="line"><a name="l00674"></a><span class="lineno">  674</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN9_OpenDrain (1)                                    </span></div><div class="line"><a name="l00677"></a><span class="lineno">  677</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00678"></a><span class="lineno">  678</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN8_Pos       (8)                                    </span></div><div class="line"><a name="l00679"></a><span class="lineno">  679</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN8_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN8_Pos) </span></div><div class="line"><a name="l00680"></a><span class="lineno">  680</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN8_PushPull  (0)                                    </span></div><div class="line"><a name="l00681"></a><span class="lineno">  681</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN8_OpenDrain (1)                                    </span></div><div class="line"><a name="l00684"></a><span class="lineno">  684</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00685"></a><span class="lineno">  685</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN7_Pos       (7)                                    </span></div><div class="line"><a name="l00686"></a><span class="lineno">  686</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN7_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN7_Pos) </span></div><div class="line"><a name="l00687"></a><span class="lineno">  687</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN7_PushPull  (0)                                    </span></div><div class="line"><a name="l00688"></a><span class="lineno">  688</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN7_OpenDrain (1)                                    </span></div><div class="line"><a name="l00691"></a><span class="lineno">  691</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00692"></a><span class="lineno">  692</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN6_Pos       (6)                                    </span></div><div class="line"><a name="l00693"></a><span class="lineno">  693</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN6_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN6_Pos) </span></div><div class="line"><a name="l00694"></a><span class="lineno">  694</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN6_PushPull  (0)                                    </span></div><div class="line"><a name="l00695"></a><span class="lineno">  695</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN6_OpenDrain (1)                                    </span></div><div class="line"><a name="l00698"></a><span class="lineno">  698</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00699"></a><span class="lineno">  699</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN5_Pos       (5)                                    </span></div><div class="line"><a name="l00700"></a><span class="lineno">  700</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN5_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN5_Pos) </span></div><div class="line"><a name="l00701"></a><span class="lineno">  701</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN5_PushPull  (0)                                    </span></div><div class="line"><a name="l00702"></a><span class="lineno">  702</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN5_OpenDrain (1)                                    </span></div><div class="line"><a name="l00705"></a><span class="lineno">  705</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00706"></a><span class="lineno">  706</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN4_Pos       (4)                                    </span></div><div class="line"><a name="l00707"></a><span class="lineno">  707</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN4_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN4_Pos) </span></div><div class="line"><a name="l00708"></a><span class="lineno">  708</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN4_PushPull  (0)                                    </span></div><div class="line"><a name="l00709"></a><span class="lineno">  709</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN4_OpenDrain (1)                                    </span></div><div class="line"><a name="l00712"></a><span class="lineno">  712</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00713"></a><span class="lineno">  713</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN3_Pos       (3)                                    </span></div><div class="line"><a name="l00714"></a><span class="lineno">  714</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN3_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN3_Pos) </span></div><div class="line"><a name="l00715"></a><span class="lineno">  715</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN3_PushPull  (0)                                    </span></div><div class="line"><a name="l00716"></a><span class="lineno">  716</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN3_OpenDrain (1)                                    </span></div><div class="line"><a name="l00719"></a><span class="lineno">  719</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00720"></a><span class="lineno">  720</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN2_Pos       (2)                                    </span></div><div class="line"><a name="l00721"></a><span class="lineno">  721</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN2_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN2_Pos) </span></div><div class="line"><a name="l00722"></a><span class="lineno">  722</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN2_PushPull  (0)                                    </span></div><div class="line"><a name="l00723"></a><span class="lineno">  723</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN2_OpenDrain (1)                                    </span></div><div class="line"><a name="l00726"></a><span class="lineno">  726</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00727"></a><span class="lineno">  727</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN1_Pos       (1)                                    </span></div><div class="line"><a name="l00728"></a><span class="lineno">  728</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN1_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN1_Pos) </span></div><div class="line"><a name="l00729"></a><span class="lineno">  729</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN1_PushPull  (0)                                    </span></div><div class="line"><a name="l00730"></a><span class="lineno">  730</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN1_OpenDrain (1)                                    </span></div><div class="line"><a name="l00733"></a><span class="lineno">  733</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Enables/Disables open drain operation for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00734"></a><span class="lineno">  734</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN0_Pos       (0)                                    </span></div><div class="line"><a name="l00735"></a><span class="lineno">  735</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN0_Msk       (0x1 &lt;&lt; DRV_SX1509_OPENDRAIN_PIN0_Pos) </span></div><div class="line"><a name="l00736"></a><span class="lineno">  736</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN0_PushPull  (0)                                    </span></div><div class="line"><a name="l00737"></a><span class="lineno">  737</span>&#160;<span class="preprocessor">#define DRV_SX1509_OPENDRAIN_PIN0_OpenDrain (1)                                    </span></div><div class="line"><a name="l00740"></a><span class="lineno">  740</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: POLARITY. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00741"></a><span class="lineno">  741</span>&#160;<span class="comment">/* Description: Enables/Disables polarity inversion for each IO. */</span></div><div class="line"><a name="l00742"></a><span class="lineno">  742</span>&#160;</div><div class="line"><a name="l00743"></a><span class="lineno">  743</span>&#160;</div><div class="line"><a name="l00744"></a><span class="lineno">  744</span>&#160;<span class="comment">/* Field PIN15: Enables/Disables polarity inversion for each IO. */</span></div><div class="line"><a name="l00745"></a><span class="lineno">  745</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN15_Pos      (15)                                   </span></div><div class="line"><a name="l00746"></a><span class="lineno">  746</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN15_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN15_Pos) </span></div><div class="line"><a name="l00747"></a><span class="lineno">  747</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN15_Normal   (0)                                    </span></div><div class="line"><a name="l00748"></a><span class="lineno">  748</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN15_Inverted (1)                                    </span></div><div class="line"><a name="l00751"></a><span class="lineno">  751</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00752"></a><span class="lineno">  752</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN14_Pos      (14)                                   </span></div><div class="line"><a name="l00753"></a><span class="lineno">  753</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN14_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN14_Pos) </span></div><div class="line"><a name="l00754"></a><span class="lineno">  754</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN14_Normal   (0)                                    </span></div><div class="line"><a name="l00755"></a><span class="lineno">  755</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN14_Inverted (1)                                    </span></div><div class="line"><a name="l00758"></a><span class="lineno">  758</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00759"></a><span class="lineno">  759</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN13_Pos      (13)                                   </span></div><div class="line"><a name="l00760"></a><span class="lineno">  760</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN13_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN13_Pos) </span></div><div class="line"><a name="l00761"></a><span class="lineno">  761</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN13_Normal   (0)                                    </span></div><div class="line"><a name="l00762"></a><span class="lineno">  762</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN13_Inverted (1)                                    </span></div><div class="line"><a name="l00765"></a><span class="lineno">  765</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00766"></a><span class="lineno">  766</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN12_Pos      (12)                                   </span></div><div class="line"><a name="l00767"></a><span class="lineno">  767</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN12_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN12_Pos) </span></div><div class="line"><a name="l00768"></a><span class="lineno">  768</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN12_Normal   (0)                                    </span></div><div class="line"><a name="l00769"></a><span class="lineno">  769</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN12_Inverted (1)                                    </span></div><div class="line"><a name="l00772"></a><span class="lineno">  772</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00773"></a><span class="lineno">  773</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN11_Pos      (11)                                   </span></div><div class="line"><a name="l00774"></a><span class="lineno">  774</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN11_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN11_Pos) </span></div><div class="line"><a name="l00775"></a><span class="lineno">  775</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN11_Normal   (0)                                    </span></div><div class="line"><a name="l00776"></a><span class="lineno">  776</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN11_Inverted (1)                                    </span></div><div class="line"><a name="l00779"></a><span class="lineno">  779</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00780"></a><span class="lineno">  780</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN10_Pos      (10)                                   </span></div><div class="line"><a name="l00781"></a><span class="lineno">  781</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN10_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN10_Pos) </span></div><div class="line"><a name="l00782"></a><span class="lineno">  782</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN10_Normal   (0)                                    </span></div><div class="line"><a name="l00783"></a><span class="lineno">  783</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN10_Inverted (1)                                    </span></div><div class="line"><a name="l00786"></a><span class="lineno">  786</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00787"></a><span class="lineno">  787</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN9_Pos      (9)                                   </span></div><div class="line"><a name="l00788"></a><span class="lineno">  788</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN9_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN9_Pos) </span></div><div class="line"><a name="l00789"></a><span class="lineno">  789</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN9_Normal   (0)                                   </span></div><div class="line"><a name="l00790"></a><span class="lineno">  790</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN9_Inverted (1)                                   </span></div><div class="line"><a name="l00793"></a><span class="lineno">  793</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00794"></a><span class="lineno">  794</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN8_Pos      (8)                                   </span></div><div class="line"><a name="l00795"></a><span class="lineno">  795</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN8_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN8_Pos) </span></div><div class="line"><a name="l00796"></a><span class="lineno">  796</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN8_Normal   (0)                                   </span></div><div class="line"><a name="l00797"></a><span class="lineno">  797</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN8_Inverted (1)                                   </span></div><div class="line"><a name="l00800"></a><span class="lineno">  800</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00801"></a><span class="lineno">  801</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN7_Pos      (7)                                   </span></div><div class="line"><a name="l00802"></a><span class="lineno">  802</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN7_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN7_Pos) </span></div><div class="line"><a name="l00803"></a><span class="lineno">  803</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN7_Normal   (0)                                   </span></div><div class="line"><a name="l00804"></a><span class="lineno">  804</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN7_Inverted (1)                                   </span></div><div class="line"><a name="l00807"></a><span class="lineno">  807</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00808"></a><span class="lineno">  808</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN6_Pos      (6)                                   </span></div><div class="line"><a name="l00809"></a><span class="lineno">  809</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN6_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN6_Pos) </span></div><div class="line"><a name="l00810"></a><span class="lineno">  810</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN6_Normal   (0)                                   </span></div><div class="line"><a name="l00811"></a><span class="lineno">  811</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN6_Inverted (1)                                   </span></div><div class="line"><a name="l00814"></a><span class="lineno">  814</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00815"></a><span class="lineno">  815</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN5_Pos      (5)                                   </span></div><div class="line"><a name="l00816"></a><span class="lineno">  816</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN5_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN5_Pos) </span></div><div class="line"><a name="l00817"></a><span class="lineno">  817</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN5_Normal   (0)                                   </span></div><div class="line"><a name="l00818"></a><span class="lineno">  818</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN5_Inverted (1)                                   </span></div><div class="line"><a name="l00821"></a><span class="lineno">  821</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00822"></a><span class="lineno">  822</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN4_Pos      (4)                                   </span></div><div class="line"><a name="l00823"></a><span class="lineno">  823</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN4_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN4_Pos) </span></div><div class="line"><a name="l00824"></a><span class="lineno">  824</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN4_Normal   (0)                                   </span></div><div class="line"><a name="l00825"></a><span class="lineno">  825</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN4_Inverted (1)                                   </span></div><div class="line"><a name="l00828"></a><span class="lineno">  828</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00829"></a><span class="lineno">  829</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN3_Pos      (3)                                   </span></div><div class="line"><a name="l00830"></a><span class="lineno">  830</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN3_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN3_Pos) </span></div><div class="line"><a name="l00831"></a><span class="lineno">  831</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN3_Normal   (0)                                   </span></div><div class="line"><a name="l00832"></a><span class="lineno">  832</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN3_Inverted (1)                                   </span></div><div class="line"><a name="l00835"></a><span class="lineno">  835</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00836"></a><span class="lineno">  836</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN2_Pos      (2)                                   </span></div><div class="line"><a name="l00837"></a><span class="lineno">  837</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN2_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN2_Pos) </span></div><div class="line"><a name="l00838"></a><span class="lineno">  838</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN2_Normal   (0)                                   </span></div><div class="line"><a name="l00839"></a><span class="lineno">  839</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN2_Inverted (1)                                   </span></div><div class="line"><a name="l00842"></a><span class="lineno">  842</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00843"></a><span class="lineno">  843</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN1_Pos      (1)                                   </span></div><div class="line"><a name="l00844"></a><span class="lineno">  844</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN1_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN1_Pos) </span></div><div class="line"><a name="l00845"></a><span class="lineno">  845</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN1_Normal   (0)                                   </span></div><div class="line"><a name="l00846"></a><span class="lineno">  846</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN1_Inverted (1)                                   </span></div><div class="line"><a name="l00849"></a><span class="lineno">  849</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Enables/Disables polarity inversion for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00850"></a><span class="lineno">  850</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN0_Pos      (0)                                   </span></div><div class="line"><a name="l00851"></a><span class="lineno">  851</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN0_Msk      (0x1 &lt;&lt; DRV_SX1509_POLARITY_PIN0_Pos) </span></div><div class="line"><a name="l00852"></a><span class="lineno">  852</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN0_Normal   (0)                                   </span></div><div class="line"><a name="l00853"></a><span class="lineno">  853</span>&#160;<span class="preprocessor">#define DRV_SX1509_POLARITY_PIN0_Inverted (1)                                   </span></div><div class="line"><a name="l00856"></a><span class="lineno">  856</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: DIR. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00857"></a><span class="lineno">  857</span>&#160;<span class="comment">/* Description: Configures direction for each IO. */</span></div><div class="line"><a name="l00858"></a><span class="lineno">  858</span>&#160;</div><div class="line"><a name="l00859"></a><span class="lineno">  859</span>&#160;</div><div class="line"><a name="l00860"></a><span class="lineno">  860</span>&#160;<span class="comment">/* Field PIN15: Configures direction for each IO. */</span></div><div class="line"><a name="l00861"></a><span class="lineno">  861</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN15_Pos    (15)                              </span></div><div class="line"><a name="l00862"></a><span class="lineno">  862</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN15_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN15_Pos) </span></div><div class="line"><a name="l00863"></a><span class="lineno">  863</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN15_Output (0)                               </span></div><div class="line"><a name="l00864"></a><span class="lineno">  864</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN15_Input  (1)                               </span></div><div class="line"><a name="l00867"></a><span class="lineno">  867</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00868"></a><span class="lineno">  868</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN14_Pos    (14)                              </span></div><div class="line"><a name="l00869"></a><span class="lineno">  869</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN14_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN14_Pos) </span></div><div class="line"><a name="l00870"></a><span class="lineno">  870</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN14_Output (0)                               </span></div><div class="line"><a name="l00871"></a><span class="lineno">  871</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN14_Input  (1)                               </span></div><div class="line"><a name="l00874"></a><span class="lineno">  874</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00875"></a><span class="lineno">  875</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN13_Pos    (13)                              </span></div><div class="line"><a name="l00876"></a><span class="lineno">  876</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN13_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN13_Pos) </span></div><div class="line"><a name="l00877"></a><span class="lineno">  877</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN13_Output (0)                               </span></div><div class="line"><a name="l00878"></a><span class="lineno">  878</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN13_Input  (1)                               </span></div><div class="line"><a name="l00881"></a><span class="lineno">  881</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00882"></a><span class="lineno">  882</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN12_Pos    (12)                              </span></div><div class="line"><a name="l00883"></a><span class="lineno">  883</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN12_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN12_Pos) </span></div><div class="line"><a name="l00884"></a><span class="lineno">  884</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN12_Output (0)                               </span></div><div class="line"><a name="l00885"></a><span class="lineno">  885</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN12_Input  (1)                               </span></div><div class="line"><a name="l00888"></a><span class="lineno">  888</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00889"></a><span class="lineno">  889</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN11_Pos    (11)                              </span></div><div class="line"><a name="l00890"></a><span class="lineno">  890</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN11_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN11_Pos) </span></div><div class="line"><a name="l00891"></a><span class="lineno">  891</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN11_Output (0)                               </span></div><div class="line"><a name="l00892"></a><span class="lineno">  892</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN11_Input  (1)                               </span></div><div class="line"><a name="l00895"></a><span class="lineno">  895</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00896"></a><span class="lineno">  896</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN10_Pos    (10)                              </span></div><div class="line"><a name="l00897"></a><span class="lineno">  897</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN10_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN10_Pos) </span></div><div class="line"><a name="l00898"></a><span class="lineno">  898</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN10_Output (0)                               </span></div><div class="line"><a name="l00899"></a><span class="lineno">  899</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN10_Input  (1)                               </span></div><div class="line"><a name="l00902"></a><span class="lineno">  902</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00903"></a><span class="lineno">  903</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN9_Pos    (9)                              </span></div><div class="line"><a name="l00904"></a><span class="lineno">  904</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN9_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN9_Pos) </span></div><div class="line"><a name="l00905"></a><span class="lineno">  905</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN9_Output (0)                              </span></div><div class="line"><a name="l00906"></a><span class="lineno">  906</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN9_Input  (1)                              </span></div><div class="line"><a name="l00909"></a><span class="lineno">  909</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00910"></a><span class="lineno">  910</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN8_Pos    (8)                              </span></div><div class="line"><a name="l00911"></a><span class="lineno">  911</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN8_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN8_Pos) </span></div><div class="line"><a name="l00912"></a><span class="lineno">  912</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN8_Output (0)                              </span></div><div class="line"><a name="l00913"></a><span class="lineno">  913</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN8_Input  (1)                              </span></div><div class="line"><a name="l00916"></a><span class="lineno">  916</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00917"></a><span class="lineno">  917</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN7_Pos    (7)                              </span></div><div class="line"><a name="l00918"></a><span class="lineno">  918</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN7_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN7_Pos) </span></div><div class="line"><a name="l00919"></a><span class="lineno">  919</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN7_Output (0)                              </span></div><div class="line"><a name="l00920"></a><span class="lineno">  920</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN7_Input  (1)                              </span></div><div class="line"><a name="l00923"></a><span class="lineno">  923</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00924"></a><span class="lineno">  924</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN6_Pos    (6)                              </span></div><div class="line"><a name="l00925"></a><span class="lineno">  925</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN6_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN6_Pos) </span></div><div class="line"><a name="l00926"></a><span class="lineno">  926</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN6_Output (0)                              </span></div><div class="line"><a name="l00927"></a><span class="lineno">  927</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN6_Input  (1)                              </span></div><div class="line"><a name="l00930"></a><span class="lineno">  930</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00931"></a><span class="lineno">  931</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN5_Pos    (5)                              </span></div><div class="line"><a name="l00932"></a><span class="lineno">  932</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN5_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN5_Pos) </span></div><div class="line"><a name="l00933"></a><span class="lineno">  933</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN5_Output (0)                              </span></div><div class="line"><a name="l00934"></a><span class="lineno">  934</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN5_Input  (1)                              </span></div><div class="line"><a name="l00937"></a><span class="lineno">  937</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00938"></a><span class="lineno">  938</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN4_Pos    (4)                              </span></div><div class="line"><a name="l00939"></a><span class="lineno">  939</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN4_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN4_Pos) </span></div><div class="line"><a name="l00940"></a><span class="lineno">  940</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN4_Output (0)                              </span></div><div class="line"><a name="l00941"></a><span class="lineno">  941</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN4_Input  (1)                              </span></div><div class="line"><a name="l00944"></a><span class="lineno">  944</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00945"></a><span class="lineno">  945</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN3_Pos    (3)                              </span></div><div class="line"><a name="l00946"></a><span class="lineno">  946</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN3_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN3_Pos) </span></div><div class="line"><a name="l00947"></a><span class="lineno">  947</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN3_Output (0)                              </span></div><div class="line"><a name="l00948"></a><span class="lineno">  948</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN3_Input  (1)                              </span></div><div class="line"><a name="l00951"></a><span class="lineno">  951</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00952"></a><span class="lineno">  952</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN2_Pos    (2)                              </span></div><div class="line"><a name="l00953"></a><span class="lineno">  953</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN2_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN2_Pos) </span></div><div class="line"><a name="l00954"></a><span class="lineno">  954</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN2_Output (0)                              </span></div><div class="line"><a name="l00955"></a><span class="lineno">  955</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN2_Input  (1)                              </span></div><div class="line"><a name="l00958"></a><span class="lineno">  958</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00959"></a><span class="lineno">  959</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN1_Pos    (1)                              </span></div><div class="line"><a name="l00960"></a><span class="lineno">  960</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN1_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN1_Pos) </span></div><div class="line"><a name="l00961"></a><span class="lineno">  961</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN1_Output (0)                              </span></div><div class="line"><a name="l00962"></a><span class="lineno">  962</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN1_Input  (1)                              </span></div><div class="line"><a name="l00965"></a><span class="lineno">  965</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Configures direction for each IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00966"></a><span class="lineno">  966</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN0_Pos    (0)                              </span></div><div class="line"><a name="l00967"></a><span class="lineno">  967</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN0_Msk    (0x1 &lt;&lt; DRV_SX1509_DIR_PIN0_Pos) </span></div><div class="line"><a name="l00968"></a><span class="lineno">  968</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN0_Output (0)                              </span></div><div class="line"><a name="l00969"></a><span class="lineno">  969</span>&#160;<span class="preprocessor">#define DRV_SX1509_DIR_PIN0_Input  (1)                              </span></div><div class="line"><a name="l00972"></a><span class="lineno">  972</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: DATA. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00973"></a><span class="lineno">  973</span>&#160;<span class="comment">/* Description: Data register - I/O. */</span></div><div class="line"><a name="l00974"></a><span class="lineno">  974</span>&#160;</div><div class="line"><a name="l00975"></a><span class="lineno">  975</span>&#160;</div><div class="line"><a name="l00976"></a><span class="lineno">  976</span>&#160;<span class="comment">/* Field PIN15: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span></div><div class="line"><a name="l00977"></a><span class="lineno">  977</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN15_Pos  (15)                               </span></div><div class="line"><a name="l00978"></a><span class="lineno">  978</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN15_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN15_Pos) </span></div><div class="line"><a name="l00979"></a><span class="lineno">  979</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN15_Low  (0)                                </span></div><div class="line"><a name="l00980"></a><span class="lineno">  980</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN15_High (1)                                </span></div><div class="line"><a name="l00983"></a><span class="lineno">  983</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00984"></a><span class="lineno">  984</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN14_Pos  (14)                               </span></div><div class="line"><a name="l00985"></a><span class="lineno">  985</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN14_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN14_Pos) </span></div><div class="line"><a name="l00986"></a><span class="lineno">  986</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN14_Low  (0)                                </span></div><div class="line"><a name="l00987"></a><span class="lineno">  987</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN14_High (1)                                </span></div><div class="line"><a name="l00990"></a><span class="lineno">  990</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00991"></a><span class="lineno">  991</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN13_Pos  (13)                               </span></div><div class="line"><a name="l00992"></a><span class="lineno">  992</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN13_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN13_Pos) </span></div><div class="line"><a name="l00993"></a><span class="lineno">  993</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN13_Low  (0)                                </span></div><div class="line"><a name="l00994"></a><span class="lineno">  994</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN13_High (1)                                </span></div><div class="line"><a name="l00997"></a><span class="lineno">  997</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l00998"></a><span class="lineno">  998</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN12_Pos  (12)                               </span></div><div class="line"><a name="l00999"></a><span class="lineno">  999</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN12_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN12_Pos) </span></div><div class="line"><a name="l01000"></a><span class="lineno"> 1000</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN12_Low  (0)                                </span></div><div class="line"><a name="l01001"></a><span class="lineno"> 1001</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN12_High (1)                                </span></div><div class="line"><a name="l01004"></a><span class="lineno"> 1004</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01005"></a><span class="lineno"> 1005</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN11_Pos  (11)                               </span></div><div class="line"><a name="l01006"></a><span class="lineno"> 1006</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN11_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN11_Pos) </span></div><div class="line"><a name="l01007"></a><span class="lineno"> 1007</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN11_Low  (0)                                </span></div><div class="line"><a name="l01008"></a><span class="lineno"> 1008</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN11_High (1)                                </span></div><div class="line"><a name="l01011"></a><span class="lineno"> 1011</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01012"></a><span class="lineno"> 1012</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN10_Pos  (10)                               </span></div><div class="line"><a name="l01013"></a><span class="lineno"> 1013</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN10_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN10_Pos) </span></div><div class="line"><a name="l01014"></a><span class="lineno"> 1014</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN10_Low  (0)                                </span></div><div class="line"><a name="l01015"></a><span class="lineno"> 1015</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN10_High (1)                                </span></div><div class="line"><a name="l01018"></a><span class="lineno"> 1018</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01019"></a><span class="lineno"> 1019</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN9_Pos  (9)                               </span></div><div class="line"><a name="l01020"></a><span class="lineno"> 1020</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN9_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN9_Pos) </span></div><div class="line"><a name="l01021"></a><span class="lineno"> 1021</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN9_Low  (0)                               </span></div><div class="line"><a name="l01022"></a><span class="lineno"> 1022</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN9_High (1)                               </span></div><div class="line"><a name="l01025"></a><span class="lineno"> 1025</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01026"></a><span class="lineno"> 1026</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN8_Pos  (8)                               </span></div><div class="line"><a name="l01027"></a><span class="lineno"> 1027</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN8_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN8_Pos) </span></div><div class="line"><a name="l01028"></a><span class="lineno"> 1028</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN8_Low  (0)                               </span></div><div class="line"><a name="l01029"></a><span class="lineno"> 1029</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN8_High (1)                               </span></div><div class="line"><a name="l01032"></a><span class="lineno"> 1032</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01033"></a><span class="lineno"> 1033</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN7_Pos  (7)                               </span></div><div class="line"><a name="l01034"></a><span class="lineno"> 1034</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN7_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN7_Pos) </span></div><div class="line"><a name="l01035"></a><span class="lineno"> 1035</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN7_Low  (0)                               </span></div><div class="line"><a name="l01036"></a><span class="lineno"> 1036</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN7_High (1)                               </span></div><div class="line"><a name="l01039"></a><span class="lineno"> 1039</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01040"></a><span class="lineno"> 1040</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN6_Pos  (6)                               </span></div><div class="line"><a name="l01041"></a><span class="lineno"> 1041</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN6_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN6_Pos) </span></div><div class="line"><a name="l01042"></a><span class="lineno"> 1042</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN6_Low  (0)                               </span></div><div class="line"><a name="l01043"></a><span class="lineno"> 1043</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN6_High (1)                               </span></div><div class="line"><a name="l01046"></a><span class="lineno"> 1046</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01047"></a><span class="lineno"> 1047</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN5_Pos  (5)                               </span></div><div class="line"><a name="l01048"></a><span class="lineno"> 1048</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN5_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN5_Pos) </span></div><div class="line"><a name="l01049"></a><span class="lineno"> 1049</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN5_Low  (0)                               </span></div><div class="line"><a name="l01050"></a><span class="lineno"> 1050</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN5_High (1)                               </span></div><div class="line"><a name="l01053"></a><span class="lineno"> 1053</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01054"></a><span class="lineno"> 1054</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN4_Pos  (4)                               </span></div><div class="line"><a name="l01055"></a><span class="lineno"> 1055</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN4_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN4_Pos) </span></div><div class="line"><a name="l01056"></a><span class="lineno"> 1056</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN4_Low  (0)                               </span></div><div class="line"><a name="l01057"></a><span class="lineno"> 1057</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN4_High (1)                               </span></div><div class="line"><a name="l01060"></a><span class="lineno"> 1060</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01061"></a><span class="lineno"> 1061</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN3_Pos  (3)                               </span></div><div class="line"><a name="l01062"></a><span class="lineno"> 1062</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN3_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN3_Pos) </span></div><div class="line"><a name="l01063"></a><span class="lineno"> 1063</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN3_Low  (0)                               </span></div><div class="line"><a name="l01064"></a><span class="lineno"> 1064</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN3_High (1)                               </span></div><div class="line"><a name="l01067"></a><span class="lineno"> 1067</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01068"></a><span class="lineno"> 1068</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN2_Pos  (2)                               </span></div><div class="line"><a name="l01069"></a><span class="lineno"> 1069</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN2_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN2_Pos) </span></div><div class="line"><a name="l01070"></a><span class="lineno"> 1070</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN2_Low  (0)                               </span></div><div class="line"><a name="l01071"></a><span class="lineno"> 1071</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN2_High (1)                               </span></div><div class="line"><a name="l01074"></a><span class="lineno"> 1074</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01075"></a><span class="lineno"> 1075</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN1_Pos  (1)                               </span></div><div class="line"><a name="l01076"></a><span class="lineno"> 1076</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN1_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN1_Pos) </span></div><div class="line"><a name="l01077"></a><span class="lineno"> 1077</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN1_Low  (0)                               </span></div><div class="line"><a name="l01078"></a><span class="lineno"> 1078</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN1_High (1)                               </span></div><div class="line"><a name="l01081"></a><span class="lineno"> 1081</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Write: Data to be output to the output-configured IOs, Read: Data seen at the IOs, independent of the direction configured.. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01082"></a><span class="lineno"> 1082</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN0_Pos  (0)                               </span></div><div class="line"><a name="l01083"></a><span class="lineno"> 1083</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN0_Msk  (0x1 &lt;&lt; DRV_SX1509_DATA_PIN0_Pos) </span></div><div class="line"><a name="l01084"></a><span class="lineno"> 1084</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN0_Low  (0)                               </span></div><div class="line"><a name="l01085"></a><span class="lineno"> 1085</span>&#160;<span class="preprocessor">#define DRV_SX1509_DATA_PIN0_High (1)                               </span></div><div class="line"><a name="l01088"></a><span class="lineno"> 1088</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: INTERRUPTMASK. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01089"></a><span class="lineno"> 1089</span>&#160;<span class="comment">/* Description: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span></div><div class="line"><a name="l01090"></a><span class="lineno"> 1090</span>&#160;</div><div class="line"><a name="l01091"></a><span class="lineno"> 1091</span>&#160;</div><div class="line"><a name="l01092"></a><span class="lineno"> 1092</span>&#160;<span class="comment">/* Field PIN15: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span></div><div class="line"><a name="l01093"></a><span class="lineno"> 1093</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN15_Pos      (15)                                        </span></div><div class="line"><a name="l01094"></a><span class="lineno"> 1094</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN15_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN15_Pos) </span></div><div class="line"><a name="l01095"></a><span class="lineno"> 1095</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN15_Unmasked (0)                                         </span></div><div class="line"><a name="l01096"></a><span class="lineno"> 1096</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN15_Masked   (1)                                         </span></div><div class="line"><a name="l01099"></a><span class="lineno"> 1099</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01100"></a><span class="lineno"> 1100</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN14_Pos      (14)                                        </span></div><div class="line"><a name="l01101"></a><span class="lineno"> 1101</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN14_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN14_Pos) </span></div><div class="line"><a name="l01102"></a><span class="lineno"> 1102</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN14_Unmasked (0)                                         </span></div><div class="line"><a name="l01103"></a><span class="lineno"> 1103</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN14_Masked   (1)                                         </span></div><div class="line"><a name="l01106"></a><span class="lineno"> 1106</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01107"></a><span class="lineno"> 1107</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN13_Pos      (13)                                        </span></div><div class="line"><a name="l01108"></a><span class="lineno"> 1108</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN13_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN13_Pos) </span></div><div class="line"><a name="l01109"></a><span class="lineno"> 1109</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN13_Unmasked (0)                                         </span></div><div class="line"><a name="l01110"></a><span class="lineno"> 1110</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN13_Masked   (1)                                         </span></div><div class="line"><a name="l01113"></a><span class="lineno"> 1113</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01114"></a><span class="lineno"> 1114</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN12_Pos      (12)                                        </span></div><div class="line"><a name="l01115"></a><span class="lineno"> 1115</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN12_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN12_Pos) </span></div><div class="line"><a name="l01116"></a><span class="lineno"> 1116</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN12_Unmasked (0)                                         </span></div><div class="line"><a name="l01117"></a><span class="lineno"> 1117</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN12_Masked   (1)                                         </span></div><div class="line"><a name="l01120"></a><span class="lineno"> 1120</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01121"></a><span class="lineno"> 1121</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN11_Pos      (11)                                        </span></div><div class="line"><a name="l01122"></a><span class="lineno"> 1122</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN11_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN11_Pos) </span></div><div class="line"><a name="l01123"></a><span class="lineno"> 1123</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN11_Unmasked (0)                                         </span></div><div class="line"><a name="l01124"></a><span class="lineno"> 1124</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN11_Masked   (1)                                         </span></div><div class="line"><a name="l01127"></a><span class="lineno"> 1127</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01128"></a><span class="lineno"> 1128</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN10_Pos      (10)                                        </span></div><div class="line"><a name="l01129"></a><span class="lineno"> 1129</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN10_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN10_Pos) </span></div><div class="line"><a name="l01130"></a><span class="lineno"> 1130</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN10_Unmasked (0)                                         </span></div><div class="line"><a name="l01131"></a><span class="lineno"> 1131</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN10_Masked   (1)                                         </span></div><div class="line"><a name="l01134"></a><span class="lineno"> 1134</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01135"></a><span class="lineno"> 1135</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN9_Pos      (9)                                        </span></div><div class="line"><a name="l01136"></a><span class="lineno"> 1136</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN9_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN9_Pos) </span></div><div class="line"><a name="l01137"></a><span class="lineno"> 1137</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN9_Unmasked (0)                                        </span></div><div class="line"><a name="l01138"></a><span class="lineno"> 1138</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN9_Masked   (1)                                        </span></div><div class="line"><a name="l01141"></a><span class="lineno"> 1141</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01142"></a><span class="lineno"> 1142</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN8_Pos      (8)                                        </span></div><div class="line"><a name="l01143"></a><span class="lineno"> 1143</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN8_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN8_Pos) </span></div><div class="line"><a name="l01144"></a><span class="lineno"> 1144</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN8_Unmasked (0)                                        </span></div><div class="line"><a name="l01145"></a><span class="lineno"> 1145</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN8_Masked   (1)                                        </span></div><div class="line"><a name="l01148"></a><span class="lineno"> 1148</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01149"></a><span class="lineno"> 1149</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN7_Pos      (7)                                        </span></div><div class="line"><a name="l01150"></a><span class="lineno"> 1150</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN7_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN7_Pos) </span></div><div class="line"><a name="l01151"></a><span class="lineno"> 1151</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN7_Unmasked (0)                                        </span></div><div class="line"><a name="l01152"></a><span class="lineno"> 1152</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN7_Masked   (1)                                        </span></div><div class="line"><a name="l01155"></a><span class="lineno"> 1155</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01156"></a><span class="lineno"> 1156</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN6_Pos      (6)                                        </span></div><div class="line"><a name="l01157"></a><span class="lineno"> 1157</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN6_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN6_Pos) </span></div><div class="line"><a name="l01158"></a><span class="lineno"> 1158</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN6_Unmasked (0)                                        </span></div><div class="line"><a name="l01159"></a><span class="lineno"> 1159</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN6_Masked   (1)                                        </span></div><div class="line"><a name="l01162"></a><span class="lineno"> 1162</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01163"></a><span class="lineno"> 1163</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN5_Pos      (5)                                        </span></div><div class="line"><a name="l01164"></a><span class="lineno"> 1164</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN5_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN5_Pos) </span></div><div class="line"><a name="l01165"></a><span class="lineno"> 1165</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN5_Unmasked (0)                                        </span></div><div class="line"><a name="l01166"></a><span class="lineno"> 1166</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN5_Masked   (1)                                        </span></div><div class="line"><a name="l01169"></a><span class="lineno"> 1169</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01170"></a><span class="lineno"> 1170</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN4_Pos      (4)                                        </span></div><div class="line"><a name="l01171"></a><span class="lineno"> 1171</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN4_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN4_Pos) </span></div><div class="line"><a name="l01172"></a><span class="lineno"> 1172</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN4_Unmasked (0)                                        </span></div><div class="line"><a name="l01173"></a><span class="lineno"> 1173</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN4_Masked   (1)                                        </span></div><div class="line"><a name="l01176"></a><span class="lineno"> 1176</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01177"></a><span class="lineno"> 1177</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN3_Pos      (3)                                        </span></div><div class="line"><a name="l01178"></a><span class="lineno"> 1178</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN3_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN3_Pos) </span></div><div class="line"><a name="l01179"></a><span class="lineno"> 1179</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN3_Unmasked (0)                                        </span></div><div class="line"><a name="l01180"></a><span class="lineno"> 1180</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN3_Masked   (1)                                        </span></div><div class="line"><a name="l01183"></a><span class="lineno"> 1183</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01184"></a><span class="lineno"> 1184</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN2_Pos      (2)                                        </span></div><div class="line"><a name="l01185"></a><span class="lineno"> 1185</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN2_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN2_Pos) </span></div><div class="line"><a name="l01186"></a><span class="lineno"> 1186</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN2_Unmasked (0)                                        </span></div><div class="line"><a name="l01187"></a><span class="lineno"> 1187</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN2_Masked   (1)                                        </span></div><div class="line"><a name="l01190"></a><span class="lineno"> 1190</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01191"></a><span class="lineno"> 1191</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN1_Pos      (1)                                        </span></div><div class="line"><a name="l01192"></a><span class="lineno"> 1192</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN1_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN1_Pos) </span></div><div class="line"><a name="l01193"></a><span class="lineno"> 1193</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN1_Unmasked (0)                                        </span></div><div class="line"><a name="l01194"></a><span class="lineno"> 1194</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN1_Masked   (1)                                        </span></div><div class="line"><a name="l01197"></a><span class="lineno"> 1197</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Configures which [input-configured] IO will triggeran interrupt on NINT pin. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01198"></a><span class="lineno"> 1198</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN0_Pos      (0)                                        </span></div><div class="line"><a name="l01199"></a><span class="lineno"> 1199</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN0_Msk      (0x1 &lt;&lt; DRV_SX1509_INTERRUPTMASK_PIN0_Pos) </span></div><div class="line"><a name="l01200"></a><span class="lineno"> 1200</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN0_Unmasked (0)                                        </span></div><div class="line"><a name="l01201"></a><span class="lineno"> 1201</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTMASK_PIN0_Masked   (1)                                        </span></div><div class="line"><a name="l01204"></a><span class="lineno"> 1204</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: SENSE. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01205"></a><span class="lineno"> 1205</span>&#160;<span class="comment">/* Description: Configures edge sensitivity. */</span></div><div class="line"><a name="l01206"></a><span class="lineno"> 1206</span>&#160;</div><div class="line"><a name="l01207"></a><span class="lineno"> 1207</span>&#160;</div><div class="line"><a name="l01208"></a><span class="lineno"> 1208</span>&#160;<span class="comment">/* Field HIGH15: Configures the edge sensitivity of the corresponting RegData[n]. */</span></div><div class="line"><a name="l01209"></a><span class="lineno"> 1209</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH15_Pos     (30)                                 </span></div><div class="line"><a name="l01210"></a><span class="lineno"> 1210</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH15_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_HIGH15_Pos) </span></div><div class="line"><a name="l01211"></a><span class="lineno"> 1211</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH15_None    (0)                                  </span></div><div class="line"><a name="l01212"></a><span class="lineno"> 1212</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH15_Rising  (1)                                  </span></div><div class="line"><a name="l01213"></a><span class="lineno"> 1213</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH15_Falling (2)                                  </span></div><div class="line"><a name="l01214"></a><span class="lineno"> 1214</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH15_Both    (3)                                  </span></div><div class="line"><a name="l01217"></a><span class="lineno"> 1217</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field HIGH14: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01218"></a><span class="lineno"> 1218</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH14_Pos     (28)                                 </span></div><div class="line"><a name="l01219"></a><span class="lineno"> 1219</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH14_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_HIGH14_Pos) </span></div><div class="line"><a name="l01220"></a><span class="lineno"> 1220</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH14_None    (0)                                  </span></div><div class="line"><a name="l01221"></a><span class="lineno"> 1221</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH14_Rising  (1)                                  </span></div><div class="line"><a name="l01222"></a><span class="lineno"> 1222</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH14_Falling (2)                                  </span></div><div class="line"><a name="l01223"></a><span class="lineno"> 1223</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH14_Both    (3)                                  </span></div><div class="line"><a name="l01226"></a><span class="lineno"> 1226</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field HIGH13: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01227"></a><span class="lineno"> 1227</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH13_Pos     (26)                                 </span></div><div class="line"><a name="l01228"></a><span class="lineno"> 1228</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH13_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_HIGH13_Pos) </span></div><div class="line"><a name="l01229"></a><span class="lineno"> 1229</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH13_None    (0)                                  </span></div><div class="line"><a name="l01230"></a><span class="lineno"> 1230</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH13_Rising  (1)                                  </span></div><div class="line"><a name="l01231"></a><span class="lineno"> 1231</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH13_Falling (2)                                  </span></div><div class="line"><a name="l01232"></a><span class="lineno"> 1232</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH13_Both    (3)                                  </span></div><div class="line"><a name="l01235"></a><span class="lineno"> 1235</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field HIGH12: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01236"></a><span class="lineno"> 1236</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH12_Pos     (24)                                 </span></div><div class="line"><a name="l01237"></a><span class="lineno"> 1237</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH12_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_HIGH12_Pos) </span></div><div class="line"><a name="l01238"></a><span class="lineno"> 1238</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH12_None    (0)                                  </span></div><div class="line"><a name="l01239"></a><span class="lineno"> 1239</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH12_Rising  (1)                                  </span></div><div class="line"><a name="l01240"></a><span class="lineno"> 1240</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH12_Falling (2)                                  </span></div><div class="line"><a name="l01241"></a><span class="lineno"> 1241</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH12_Both    (3)                                  </span></div><div class="line"><a name="l01244"></a><span class="lineno"> 1244</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field LOW11: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01245"></a><span class="lineno"> 1245</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW11_Pos     (22)                                </span></div><div class="line"><a name="l01246"></a><span class="lineno"> 1246</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW11_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_LOW11_Pos) </span></div><div class="line"><a name="l01247"></a><span class="lineno"> 1247</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW11_None    (0)                                 </span></div><div class="line"><a name="l01248"></a><span class="lineno"> 1248</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW11_Rising  (1)                                 </span></div><div class="line"><a name="l01249"></a><span class="lineno"> 1249</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW11_Falling (2)                                 </span></div><div class="line"><a name="l01250"></a><span class="lineno"> 1250</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW11_Both    (3)                                 </span></div><div class="line"><a name="l01253"></a><span class="lineno"> 1253</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field LOW10: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01254"></a><span class="lineno"> 1254</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW10_Pos     (20)                                </span></div><div class="line"><a name="l01255"></a><span class="lineno"> 1255</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW10_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_LOW10_Pos) </span></div><div class="line"><a name="l01256"></a><span class="lineno"> 1256</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW10_None    (0)                                 </span></div><div class="line"><a name="l01257"></a><span class="lineno"> 1257</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW10_Rising  (1)                                 </span></div><div class="line"><a name="l01258"></a><span class="lineno"> 1258</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW10_Falling (2)                                 </span></div><div class="line"><a name="l01259"></a><span class="lineno"> 1259</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW10_Both    (3)                                 </span></div><div class="line"><a name="l01262"></a><span class="lineno"> 1262</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field LOW9: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01263"></a><span class="lineno"> 1263</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW9_Pos     (18)                               </span></div><div class="line"><a name="l01264"></a><span class="lineno"> 1264</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW9_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_LOW9_Pos) </span></div><div class="line"><a name="l01265"></a><span class="lineno"> 1265</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW9_None    (0)                                </span></div><div class="line"><a name="l01266"></a><span class="lineno"> 1266</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW9_Rising  (1)                                </span></div><div class="line"><a name="l01267"></a><span class="lineno"> 1267</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW9_Falling (2)                                </span></div><div class="line"><a name="l01268"></a><span class="lineno"> 1268</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW9_Both    (3)                                </span></div><div class="line"><a name="l01271"></a><span class="lineno"> 1271</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field LOW8: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01272"></a><span class="lineno"> 1272</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW8_Pos     (16)                               </span></div><div class="line"><a name="l01273"></a><span class="lineno"> 1273</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW8_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_LOW8_Pos) </span></div><div class="line"><a name="l01274"></a><span class="lineno"> 1274</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW8_None    (0)                                </span></div><div class="line"><a name="l01275"></a><span class="lineno"> 1275</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW8_Rising  (1)                                </span></div><div class="line"><a name="l01276"></a><span class="lineno"> 1276</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW8_Falling (2)                                </span></div><div class="line"><a name="l01277"></a><span class="lineno"> 1277</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW8_Both    (3)                                </span></div><div class="line"><a name="l01280"></a><span class="lineno"> 1280</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field HIGH7: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01281"></a><span class="lineno"> 1281</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH7_Pos     (14)                                </span></div><div class="line"><a name="l01282"></a><span class="lineno"> 1282</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH7_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_HIGH7_Pos) </span></div><div class="line"><a name="l01283"></a><span class="lineno"> 1283</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH7_None    (0)                                 </span></div><div class="line"><a name="l01284"></a><span class="lineno"> 1284</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH7_Rising  (1)                                 </span></div><div class="line"><a name="l01285"></a><span class="lineno"> 1285</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH7_Falling (2)                                 </span></div><div class="line"><a name="l01286"></a><span class="lineno"> 1286</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH7_Both    (3)                                 </span></div><div class="line"><a name="l01289"></a><span class="lineno"> 1289</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field HIGH6: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01290"></a><span class="lineno"> 1290</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH6_Pos     (12)                                </span></div><div class="line"><a name="l01291"></a><span class="lineno"> 1291</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH6_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_HIGH6_Pos) </span></div><div class="line"><a name="l01292"></a><span class="lineno"> 1292</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH6_None    (0)                                 </span></div><div class="line"><a name="l01293"></a><span class="lineno"> 1293</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH6_Rising  (1)                                 </span></div><div class="line"><a name="l01294"></a><span class="lineno"> 1294</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH6_Falling (2)                                 </span></div><div class="line"><a name="l01295"></a><span class="lineno"> 1295</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH6_Both    (3)                                 </span></div><div class="line"><a name="l01298"></a><span class="lineno"> 1298</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field HIGH5: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01299"></a><span class="lineno"> 1299</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH5_Pos     (10)                                </span></div><div class="line"><a name="l01300"></a><span class="lineno"> 1300</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH5_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_HIGH5_Pos) </span></div><div class="line"><a name="l01301"></a><span class="lineno"> 1301</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH5_None    (0)                                 </span></div><div class="line"><a name="l01302"></a><span class="lineno"> 1302</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH5_Rising  (1)                                 </span></div><div class="line"><a name="l01303"></a><span class="lineno"> 1303</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH5_Falling (2)                                 </span></div><div class="line"><a name="l01304"></a><span class="lineno"> 1304</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH5_Both    (3)                                 </span></div><div class="line"><a name="l01307"></a><span class="lineno"> 1307</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field HIGH4: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01308"></a><span class="lineno"> 1308</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH4_Pos     (8)                                 </span></div><div class="line"><a name="l01309"></a><span class="lineno"> 1309</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH4_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_HIGH4_Pos) </span></div><div class="line"><a name="l01310"></a><span class="lineno"> 1310</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH4_None    (0)                                 </span></div><div class="line"><a name="l01311"></a><span class="lineno"> 1311</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH4_Rising  (1)                                 </span></div><div class="line"><a name="l01312"></a><span class="lineno"> 1312</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH4_Falling (2)                                 </span></div><div class="line"><a name="l01313"></a><span class="lineno"> 1313</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_HIGH4_Both    (3)                                 </span></div><div class="line"><a name="l01316"></a><span class="lineno"> 1316</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field LOW3: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01317"></a><span class="lineno"> 1317</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW3_Pos     (6)                                </span></div><div class="line"><a name="l01318"></a><span class="lineno"> 1318</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW3_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_LOW3_Pos) </span></div><div class="line"><a name="l01319"></a><span class="lineno"> 1319</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW3_None    (0)                                </span></div><div class="line"><a name="l01320"></a><span class="lineno"> 1320</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW3_Rising  (1)                                </span></div><div class="line"><a name="l01321"></a><span class="lineno"> 1321</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW3_Falling (2)                                </span></div><div class="line"><a name="l01322"></a><span class="lineno"> 1322</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW3_Both    (3)                                </span></div><div class="line"><a name="l01325"></a><span class="lineno"> 1325</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field LOW2: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01326"></a><span class="lineno"> 1326</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW2_Pos     (4)                                </span></div><div class="line"><a name="l01327"></a><span class="lineno"> 1327</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW2_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_LOW2_Pos) </span></div><div class="line"><a name="l01328"></a><span class="lineno"> 1328</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW2_None    (0)                                </span></div><div class="line"><a name="l01329"></a><span class="lineno"> 1329</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW2_Rising  (1)                                </span></div><div class="line"><a name="l01330"></a><span class="lineno"> 1330</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW2_Falling (2)                                </span></div><div class="line"><a name="l01331"></a><span class="lineno"> 1331</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW2_Both    (3)                                </span></div><div class="line"><a name="l01334"></a><span class="lineno"> 1334</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field LOW1: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01335"></a><span class="lineno"> 1335</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW1_Pos     (2)                                </span></div><div class="line"><a name="l01336"></a><span class="lineno"> 1336</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW1_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_LOW1_Pos) </span></div><div class="line"><a name="l01337"></a><span class="lineno"> 1337</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW1_None    (0)                                </span></div><div class="line"><a name="l01338"></a><span class="lineno"> 1338</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW1_Rising  (1)                                </span></div><div class="line"><a name="l01339"></a><span class="lineno"> 1339</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW1_Falling (2)                                </span></div><div class="line"><a name="l01340"></a><span class="lineno"> 1340</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW1_Both    (3)                                </span></div><div class="line"><a name="l01343"></a><span class="lineno"> 1343</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field LOW0: Configures the edge sensitivity of the corresponting RegData[n]. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01344"></a><span class="lineno"> 1344</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW0_Pos     (0)                                </span></div><div class="line"><a name="l01345"></a><span class="lineno"> 1345</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW0_Msk     (0x3 &lt;&lt; DRV_SX1509_SENSE_LOW0_Pos) </span></div><div class="line"><a name="l01346"></a><span class="lineno"> 1346</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW0_None    (0)                                </span></div><div class="line"><a name="l01347"></a><span class="lineno"> 1347</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW0_Rising  (1)                                </span></div><div class="line"><a name="l01348"></a><span class="lineno"> 1348</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW0_Falling (2)                                </span></div><div class="line"><a name="l01349"></a><span class="lineno"> 1349</span>&#160;<span class="preprocessor">#define DRV_SX1509_SENSE_LOW0_Both    (3)                                </span></div><div class="line"><a name="l01352"></a><span class="lineno"> 1352</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: INTERRUPTSOURCE. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01353"></a><span class="lineno"> 1353</span>&#160;<span class="comment">/* Description: Interrupt source register - I/O. */</span></div><div class="line"><a name="l01354"></a><span class="lineno"> 1354</span>&#160;</div><div class="line"><a name="l01355"></a><span class="lineno"> 1355</span>&#160;</div><div class="line"><a name="l01356"></a><span class="lineno"> 1356</span>&#160;<span class="comment">/* Field PIN15: Interrupt source (from IOs set in RegInterruptMask). */</span></div><div class="line"><a name="l01357"></a><span class="lineno"> 1357</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN15_Pos       (15)                                          </span></div><div class="line"><a name="l01358"></a><span class="lineno"> 1358</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN15_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN15_Pos) </span></div><div class="line"><a name="l01359"></a><span class="lineno"> 1359</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN15_None      (0)                                           </span></div><div class="line"><a name="l01360"></a><span class="lineno"> 1360</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN15_Triggered (1)                                           </span></div><div class="line"><a name="l01363"></a><span class="lineno"> 1363</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01364"></a><span class="lineno"> 1364</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN14_Pos       (14)                                          </span></div><div class="line"><a name="l01365"></a><span class="lineno"> 1365</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN14_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN14_Pos) </span></div><div class="line"><a name="l01366"></a><span class="lineno"> 1366</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN14_None      (0)                                           </span></div><div class="line"><a name="l01367"></a><span class="lineno"> 1367</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN14_Triggered (1)                                           </span></div><div class="line"><a name="l01370"></a><span class="lineno"> 1370</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01371"></a><span class="lineno"> 1371</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN13_Pos       (13)                                          </span></div><div class="line"><a name="l01372"></a><span class="lineno"> 1372</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN13_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN13_Pos) </span></div><div class="line"><a name="l01373"></a><span class="lineno"> 1373</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN13_None      (0)                                           </span></div><div class="line"><a name="l01374"></a><span class="lineno"> 1374</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN13_Triggered (1)                                           </span></div><div class="line"><a name="l01377"></a><span class="lineno"> 1377</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01378"></a><span class="lineno"> 1378</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN12_Pos       (12)                                          </span></div><div class="line"><a name="l01379"></a><span class="lineno"> 1379</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN12_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN12_Pos) </span></div><div class="line"><a name="l01380"></a><span class="lineno"> 1380</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN12_None      (0)                                           </span></div><div class="line"><a name="l01381"></a><span class="lineno"> 1381</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN12_Triggered (1)                                           </span></div><div class="line"><a name="l01384"></a><span class="lineno"> 1384</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01385"></a><span class="lineno"> 1385</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN11_Pos       (11)                                          </span></div><div class="line"><a name="l01386"></a><span class="lineno"> 1386</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN11_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN11_Pos) </span></div><div class="line"><a name="l01387"></a><span class="lineno"> 1387</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN11_None      (0)                                           </span></div><div class="line"><a name="l01388"></a><span class="lineno"> 1388</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN11_Triggered (1)                                           </span></div><div class="line"><a name="l01391"></a><span class="lineno"> 1391</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01392"></a><span class="lineno"> 1392</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN10_Pos       (10)                                          </span></div><div class="line"><a name="l01393"></a><span class="lineno"> 1393</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN10_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN10_Pos) </span></div><div class="line"><a name="l01394"></a><span class="lineno"> 1394</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN10_None      (0)                                           </span></div><div class="line"><a name="l01395"></a><span class="lineno"> 1395</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN10_Triggered (1)                                           </span></div><div class="line"><a name="l01398"></a><span class="lineno"> 1398</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01399"></a><span class="lineno"> 1399</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN9_Pos       (9)                                          </span></div><div class="line"><a name="l01400"></a><span class="lineno"> 1400</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN9_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN9_Pos) </span></div><div class="line"><a name="l01401"></a><span class="lineno"> 1401</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN9_None      (0)                                          </span></div><div class="line"><a name="l01402"></a><span class="lineno"> 1402</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN9_Triggered (1)                                          </span></div><div class="line"><a name="l01405"></a><span class="lineno"> 1405</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01406"></a><span class="lineno"> 1406</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN8_Pos       (8)                                          </span></div><div class="line"><a name="l01407"></a><span class="lineno"> 1407</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN8_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN8_Pos) </span></div><div class="line"><a name="l01408"></a><span class="lineno"> 1408</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN8_None      (0)                                          </span></div><div class="line"><a name="l01409"></a><span class="lineno"> 1409</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN8_Triggered (1)                                          </span></div><div class="line"><a name="l01412"></a><span class="lineno"> 1412</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01413"></a><span class="lineno"> 1413</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN7_Pos       (7)                                          </span></div><div class="line"><a name="l01414"></a><span class="lineno"> 1414</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN7_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN7_Pos) </span></div><div class="line"><a name="l01415"></a><span class="lineno"> 1415</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN7_None      (0)                                          </span></div><div class="line"><a name="l01416"></a><span class="lineno"> 1416</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN7_Triggered (1)                                          </span></div><div class="line"><a name="l01419"></a><span class="lineno"> 1419</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01420"></a><span class="lineno"> 1420</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN6_Pos       (6)                                          </span></div><div class="line"><a name="l01421"></a><span class="lineno"> 1421</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN6_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN6_Pos) </span></div><div class="line"><a name="l01422"></a><span class="lineno"> 1422</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN6_None      (0)                                          </span></div><div class="line"><a name="l01423"></a><span class="lineno"> 1423</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN6_Triggered (1)                                          </span></div><div class="line"><a name="l01426"></a><span class="lineno"> 1426</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01427"></a><span class="lineno"> 1427</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN5_Pos       (5)                                          </span></div><div class="line"><a name="l01428"></a><span class="lineno"> 1428</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN5_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN5_Pos) </span></div><div class="line"><a name="l01429"></a><span class="lineno"> 1429</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN5_None      (0)                                          </span></div><div class="line"><a name="l01430"></a><span class="lineno"> 1430</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN5_Triggered (1)                                          </span></div><div class="line"><a name="l01433"></a><span class="lineno"> 1433</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01434"></a><span class="lineno"> 1434</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN4_Pos       (4)                                          </span></div><div class="line"><a name="l01435"></a><span class="lineno"> 1435</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN4_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN4_Pos) </span></div><div class="line"><a name="l01436"></a><span class="lineno"> 1436</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN4_None      (0)                                          </span></div><div class="line"><a name="l01437"></a><span class="lineno"> 1437</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN4_Triggered (1)                                          </span></div><div class="line"><a name="l01440"></a><span class="lineno"> 1440</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01441"></a><span class="lineno"> 1441</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN3_Pos       (3)                                          </span></div><div class="line"><a name="l01442"></a><span class="lineno"> 1442</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN3_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN3_Pos) </span></div><div class="line"><a name="l01443"></a><span class="lineno"> 1443</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN3_None      (0)                                          </span></div><div class="line"><a name="l01444"></a><span class="lineno"> 1444</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN3_Triggered (1)                                          </span></div><div class="line"><a name="l01447"></a><span class="lineno"> 1447</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01448"></a><span class="lineno"> 1448</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN2_Pos       (2)                                          </span></div><div class="line"><a name="l01449"></a><span class="lineno"> 1449</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN2_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN2_Pos) </span></div><div class="line"><a name="l01450"></a><span class="lineno"> 1450</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN2_None      (0)                                          </span></div><div class="line"><a name="l01451"></a><span class="lineno"> 1451</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN2_Triggered (1)                                          </span></div><div class="line"><a name="l01454"></a><span class="lineno"> 1454</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01455"></a><span class="lineno"> 1455</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN1_Pos       (1)                                          </span></div><div class="line"><a name="l01456"></a><span class="lineno"> 1456</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN1_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN1_Pos) </span></div><div class="line"><a name="l01457"></a><span class="lineno"> 1457</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN1_None      (0)                                          </span></div><div class="line"><a name="l01458"></a><span class="lineno"> 1458</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN1_Triggered (1)                                          </span></div><div class="line"><a name="l01461"></a><span class="lineno"> 1461</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01462"></a><span class="lineno"> 1462</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN0_Pos       (0)                                          </span></div><div class="line"><a name="l01463"></a><span class="lineno"> 1463</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN0_Msk       (0x1 &lt;&lt; DRV_SX1509_INTERRUPTSOURCE_PIN0_Pos) </span></div><div class="line"><a name="l01464"></a><span class="lineno"> 1464</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN0_None      (0)                                          </span></div><div class="line"><a name="l01465"></a><span class="lineno"> 1465</span>&#160;<span class="preprocessor">#define DRV_SX1509_INTERRUPTSOURCE_PIN0_Triggered (1)                                          </span></div><div class="line"><a name="l01468"></a><span class="lineno"> 1468</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: EVENTSTATUS. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01469"></a><span class="lineno"> 1469</span>&#160;<span class="comment">/* Description: Event status register - I/O. */</span></div><div class="line"><a name="l01470"></a><span class="lineno"> 1470</span>&#160;</div><div class="line"><a name="l01471"></a><span class="lineno"> 1471</span>&#160;</div><div class="line"><a name="l01472"></a><span class="lineno"> 1472</span>&#160;<span class="comment">/* Field PIN15: Interrupt source (from IOs set in RegInterruptMask). */</span></div><div class="line"><a name="l01473"></a><span class="lineno"> 1473</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN15_Pos       (15)                                      </span></div><div class="line"><a name="l01474"></a><span class="lineno"> 1474</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN15_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN15_Pos) </span></div><div class="line"><a name="l01475"></a><span class="lineno"> 1475</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN15_None      (0)                                       </span></div><div class="line"><a name="l01476"></a><span class="lineno"> 1476</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN15_Triggered (1)                                       </span></div><div class="line"><a name="l01479"></a><span class="lineno"> 1479</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01480"></a><span class="lineno"> 1480</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN14_Pos       (14)                                      </span></div><div class="line"><a name="l01481"></a><span class="lineno"> 1481</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN14_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN14_Pos) </span></div><div class="line"><a name="l01482"></a><span class="lineno"> 1482</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN14_None      (0)                                       </span></div><div class="line"><a name="l01483"></a><span class="lineno"> 1483</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN14_Triggered (1)                                       </span></div><div class="line"><a name="l01486"></a><span class="lineno"> 1486</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01487"></a><span class="lineno"> 1487</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN13_Pos       (13)                                      </span></div><div class="line"><a name="l01488"></a><span class="lineno"> 1488</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN13_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN13_Pos) </span></div><div class="line"><a name="l01489"></a><span class="lineno"> 1489</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN13_None      (0)                                       </span></div><div class="line"><a name="l01490"></a><span class="lineno"> 1490</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN13_Triggered (1)                                       </span></div><div class="line"><a name="l01493"></a><span class="lineno"> 1493</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01494"></a><span class="lineno"> 1494</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN12_Pos       (12)                                      </span></div><div class="line"><a name="l01495"></a><span class="lineno"> 1495</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN12_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN12_Pos) </span></div><div class="line"><a name="l01496"></a><span class="lineno"> 1496</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN12_None      (0)                                       </span></div><div class="line"><a name="l01497"></a><span class="lineno"> 1497</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN12_Triggered (1)                                       </span></div><div class="line"><a name="l01500"></a><span class="lineno"> 1500</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01501"></a><span class="lineno"> 1501</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN11_Pos       (11)                                      </span></div><div class="line"><a name="l01502"></a><span class="lineno"> 1502</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN11_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN11_Pos) </span></div><div class="line"><a name="l01503"></a><span class="lineno"> 1503</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN11_None      (0)                                       </span></div><div class="line"><a name="l01504"></a><span class="lineno"> 1504</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN11_Triggered (1)                                       </span></div><div class="line"><a name="l01507"></a><span class="lineno"> 1507</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01508"></a><span class="lineno"> 1508</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN10_Pos       (10)                                      </span></div><div class="line"><a name="l01509"></a><span class="lineno"> 1509</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN10_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN10_Pos) </span></div><div class="line"><a name="l01510"></a><span class="lineno"> 1510</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN10_None      (0)                                       </span></div><div class="line"><a name="l01511"></a><span class="lineno"> 1511</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN10_Triggered (1)                                       </span></div><div class="line"><a name="l01514"></a><span class="lineno"> 1514</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01515"></a><span class="lineno"> 1515</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN9_Pos       (9)                                      </span></div><div class="line"><a name="l01516"></a><span class="lineno"> 1516</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN9_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN9_Pos) </span></div><div class="line"><a name="l01517"></a><span class="lineno"> 1517</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN9_None      (0)                                      </span></div><div class="line"><a name="l01518"></a><span class="lineno"> 1518</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN9_Triggered (1)                                      </span></div><div class="line"><a name="l01521"></a><span class="lineno"> 1521</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01522"></a><span class="lineno"> 1522</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN8_Pos       (8)                                      </span></div><div class="line"><a name="l01523"></a><span class="lineno"> 1523</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN8_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN8_Pos) </span></div><div class="line"><a name="l01524"></a><span class="lineno"> 1524</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN8_None      (0)                                      </span></div><div class="line"><a name="l01525"></a><span class="lineno"> 1525</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN8_Triggered (1)                                      </span></div><div class="line"><a name="l01528"></a><span class="lineno"> 1528</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01529"></a><span class="lineno"> 1529</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN7_Pos       (7)                                      </span></div><div class="line"><a name="l01530"></a><span class="lineno"> 1530</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN7_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN7_Pos) </span></div><div class="line"><a name="l01531"></a><span class="lineno"> 1531</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN7_None      (0)                                      </span></div><div class="line"><a name="l01532"></a><span class="lineno"> 1532</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN7_Triggered (1)                                      </span></div><div class="line"><a name="l01535"></a><span class="lineno"> 1535</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01536"></a><span class="lineno"> 1536</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN6_Pos       (6)                                      </span></div><div class="line"><a name="l01537"></a><span class="lineno"> 1537</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN6_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN6_Pos) </span></div><div class="line"><a name="l01538"></a><span class="lineno"> 1538</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN6_None      (0)                                      </span></div><div class="line"><a name="l01539"></a><span class="lineno"> 1539</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN6_Triggered (1)                                      </span></div><div class="line"><a name="l01542"></a><span class="lineno"> 1542</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01543"></a><span class="lineno"> 1543</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN5_Pos       (5)                                      </span></div><div class="line"><a name="l01544"></a><span class="lineno"> 1544</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN5_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN5_Pos) </span></div><div class="line"><a name="l01545"></a><span class="lineno"> 1545</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN5_None      (0)                                      </span></div><div class="line"><a name="l01546"></a><span class="lineno"> 1546</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN5_Triggered (1)                                      </span></div><div class="line"><a name="l01549"></a><span class="lineno"> 1549</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01550"></a><span class="lineno"> 1550</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN4_Pos       (4)                                      </span></div><div class="line"><a name="l01551"></a><span class="lineno"> 1551</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN4_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN4_Pos) </span></div><div class="line"><a name="l01552"></a><span class="lineno"> 1552</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN4_None      (0)                                      </span></div><div class="line"><a name="l01553"></a><span class="lineno"> 1553</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN4_Triggered (1)                                      </span></div><div class="line"><a name="l01556"></a><span class="lineno"> 1556</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01557"></a><span class="lineno"> 1557</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN3_Pos       (3)                                      </span></div><div class="line"><a name="l01558"></a><span class="lineno"> 1558</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN3_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN3_Pos) </span></div><div class="line"><a name="l01559"></a><span class="lineno"> 1559</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN3_None      (0)                                      </span></div><div class="line"><a name="l01560"></a><span class="lineno"> 1560</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN3_Triggered (1)                                      </span></div><div class="line"><a name="l01563"></a><span class="lineno"> 1563</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01564"></a><span class="lineno"> 1564</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN2_Pos       (2)                                      </span></div><div class="line"><a name="l01565"></a><span class="lineno"> 1565</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN2_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN2_Pos) </span></div><div class="line"><a name="l01566"></a><span class="lineno"> 1566</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN2_None      (0)                                      </span></div><div class="line"><a name="l01567"></a><span class="lineno"> 1567</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN2_Triggered (1)                                      </span></div><div class="line"><a name="l01570"></a><span class="lineno"> 1570</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01571"></a><span class="lineno"> 1571</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN1_Pos       (1)                                      </span></div><div class="line"><a name="l01572"></a><span class="lineno"> 1572</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN1_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN1_Pos) </span></div><div class="line"><a name="l01573"></a><span class="lineno"> 1573</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN1_None      (0)                                      </span></div><div class="line"><a name="l01574"></a><span class="lineno"> 1574</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN1_Triggered (1)                                      </span></div><div class="line"><a name="l01577"></a><span class="lineno"> 1577</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Interrupt source (from IOs set in RegInterruptMask). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01578"></a><span class="lineno"> 1578</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN0_Pos       (0)                                      </span></div><div class="line"><a name="l01579"></a><span class="lineno"> 1579</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN0_Msk       (0x1 &lt;&lt; DRV_SX1509_EVENTSTATUS_PIN0_Pos) </span></div><div class="line"><a name="l01580"></a><span class="lineno"> 1580</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN0_None      (0)                                      </span></div><div class="line"><a name="l01581"></a><span class="lineno"> 1581</span>&#160;<span class="preprocessor">#define DRV_SX1509_EVENTSTATUS_PIN0_Triggered (1)                                      </span></div><div class="line"><a name="l01584"></a><span class="lineno"> 1584</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: LEVELSHIFTER. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01585"></a><span class="lineno"> 1585</span>&#160;<span class="comment">/* Description: Level shifter register. */</span></div><div class="line"><a name="l01586"></a><span class="lineno"> 1586</span>&#160;</div><div class="line"><a name="l01587"></a><span class="lineno"> 1587</span>&#160;</div><div class="line"><a name="l01588"></a><span class="lineno"> 1588</span>&#160;<span class="comment">/* Field MODE7: Level shifter mode for IO[n] (Bank A) and IO[8 + n] (Bank B). */</span></div><div class="line"><a name="l01589"></a><span class="lineno"> 1589</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE7_Pos (14)                                       </span></div><div class="line"><a name="l01590"></a><span class="lineno"> 1590</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE7_Msk (0x3 &lt;&lt; DRV_SX1509_LEVELSHIFTER_MODE7_Pos) </span></div><div class="line"><a name="l01591"></a><span class="lineno"> 1591</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE7_Off (0)                                        </span></div><div class="line"><a name="l01592"></a><span class="lineno"> 1592</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE7_AB  (1)                                        </span></div><div class="line"><a name="l01593"></a><span class="lineno"> 1593</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE7_BA  (2)                                        </span></div><div class="line"><a name="l01596"></a><span class="lineno"> 1596</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field MODE6: Level shifter mode for IO[n] (Bank A) and IO[8 + n] (Bank B). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01597"></a><span class="lineno"> 1597</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE6_Pos (12)                                       </span></div><div class="line"><a name="l01598"></a><span class="lineno"> 1598</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE6_Msk (0x3 &lt;&lt; DRV_SX1509_LEVELSHIFTER_MODE6_Pos) </span></div><div class="line"><a name="l01599"></a><span class="lineno"> 1599</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE6_Off (0)                                        </span></div><div class="line"><a name="l01600"></a><span class="lineno"> 1600</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE6_AB  (1)                                        </span></div><div class="line"><a name="l01601"></a><span class="lineno"> 1601</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE6_BA  (2)                                        </span></div><div class="line"><a name="l01604"></a><span class="lineno"> 1604</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field MODE5: Level shifter mode for IO[n] (Bank A) and IO[8 + n] (Bank B). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01605"></a><span class="lineno"> 1605</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE5_Pos (10)                                       </span></div><div class="line"><a name="l01606"></a><span class="lineno"> 1606</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE5_Msk (0x3 &lt;&lt; DRV_SX1509_LEVELSHIFTER_MODE5_Pos) </span></div><div class="line"><a name="l01607"></a><span class="lineno"> 1607</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE5_Off (0)                                        </span></div><div class="line"><a name="l01608"></a><span class="lineno"> 1608</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE5_AB  (1)                                        </span></div><div class="line"><a name="l01609"></a><span class="lineno"> 1609</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE5_BA  (2)                                        </span></div><div class="line"><a name="l01612"></a><span class="lineno"> 1612</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field MODE4: Level shifter mode for IO[n] (Bank A) and IO[8 + n] (Bank B). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01613"></a><span class="lineno"> 1613</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE4_Pos (8)                                        </span></div><div class="line"><a name="l01614"></a><span class="lineno"> 1614</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE4_Msk (0x3 &lt;&lt; DRV_SX1509_LEVELSHIFTER_MODE4_Pos) </span></div><div class="line"><a name="l01615"></a><span class="lineno"> 1615</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE4_Off (0)                                        </span></div><div class="line"><a name="l01616"></a><span class="lineno"> 1616</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE4_AB  (1)                                        </span></div><div class="line"><a name="l01617"></a><span class="lineno"> 1617</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE4_BA  (2)                                        </span></div><div class="line"><a name="l01620"></a><span class="lineno"> 1620</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field MODE3: Level shifter mode for IO[n] (Bank A) and IO[8 + n] (Bank B). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01621"></a><span class="lineno"> 1621</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE3_Pos (6)                                        </span></div><div class="line"><a name="l01622"></a><span class="lineno"> 1622</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE3_Msk (0x3 &lt;&lt; DRV_SX1509_LEVELSHIFTER_MODE3_Pos) </span></div><div class="line"><a name="l01623"></a><span class="lineno"> 1623</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE3_Off (0)                                        </span></div><div class="line"><a name="l01624"></a><span class="lineno"> 1624</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE3_AB  (1)                                        </span></div><div class="line"><a name="l01625"></a><span class="lineno"> 1625</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE3_BA  (2)                                        </span></div><div class="line"><a name="l01628"></a><span class="lineno"> 1628</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field MODE2: Level shifter mode for IO[n] (Bank A) and IO[8 + n] (Bank B). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01629"></a><span class="lineno"> 1629</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE2_Pos (4)                                        </span></div><div class="line"><a name="l01630"></a><span class="lineno"> 1630</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE2_Msk (0x3 &lt;&lt; DRV_SX1509_LEVELSHIFTER_MODE2_Pos) </span></div><div class="line"><a name="l01631"></a><span class="lineno"> 1631</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE2_Off (0)                                        </span></div><div class="line"><a name="l01632"></a><span class="lineno"> 1632</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE2_AB  (1)                                        </span></div><div class="line"><a name="l01633"></a><span class="lineno"> 1633</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE2_BA  (2)                                        </span></div><div class="line"><a name="l01636"></a><span class="lineno"> 1636</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field MODE1: Level shifter mode for IO[n] (Bank A) and IO[8 + n] (Bank B). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01637"></a><span class="lineno"> 1637</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE1_Pos (2)                                        </span></div><div class="line"><a name="l01638"></a><span class="lineno"> 1638</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE1_Msk (0x3 &lt;&lt; DRV_SX1509_LEVELSHIFTER_MODE1_Pos) </span></div><div class="line"><a name="l01639"></a><span class="lineno"> 1639</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE1_Off (0)                                        </span></div><div class="line"><a name="l01640"></a><span class="lineno"> 1640</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE1_AB  (1)                                        </span></div><div class="line"><a name="l01641"></a><span class="lineno"> 1641</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE1_BA  (2)                                        </span></div><div class="line"><a name="l01644"></a><span class="lineno"> 1644</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field MODE0: Level shifter mode for IO[n] (Bank A) and IO[8 + n] (Bank B). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01645"></a><span class="lineno"> 1645</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE0_Pos (0)                                        </span></div><div class="line"><a name="l01646"></a><span class="lineno"> 1646</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE0_Msk (0x3 &lt;&lt; DRV_SX1509_LEVELSHIFTER_MODE0_Pos) </span></div><div class="line"><a name="l01647"></a><span class="lineno"> 1647</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE0_Off (0)                                        </span></div><div class="line"><a name="l01648"></a><span class="lineno"> 1648</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE0_AB  (1)                                        </span></div><div class="line"><a name="l01649"></a><span class="lineno"> 1649</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEVELSHIFTER_MODE0_BA  (2)                                        </span></div><div class="line"><a name="l01652"></a><span class="lineno"> 1652</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: CLOCK. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01653"></a><span class="lineno"> 1653</span>&#160;<span class="comment">/* Description: Clock management register. */</span></div><div class="line"><a name="l01654"></a><span class="lineno"> 1654</span>&#160;</div><div class="line"><a name="l01655"></a><span class="lineno"> 1655</span>&#160;</div><div class="line"><a name="l01656"></a><span class="lineno"> 1656</span>&#160;<span class="comment">/* Field RESERVED0: Unused field. */</span></div><div class="line"><a name="l01657"></a><span class="lineno"> 1657</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_RESERVED0_Pos (7)                                     </span></div><div class="line"><a name="l01658"></a><span class="lineno"> 1658</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_RESERVED0_Msk (0x1 &lt;&lt; DRV_SX1509_CLOCK_RESERVED0_Pos) </span></div><div class="line"><a name="l01661"></a><span class="lineno"> 1661</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field FOSCSRC: Oscillator frequency (fOSC) source. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01662"></a><span class="lineno"> 1662</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_FOSCSRC_Pos     (5)                                   </span></div><div class="line"><a name="l01663"></a><span class="lineno"> 1663</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_FOSCSRC_Msk     (0x3 &lt;&lt; DRV_SX1509_CLOCK_FOSCSRC_Pos) </span></div><div class="line"><a name="l01664"></a><span class="lineno"> 1664</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_FOSCSRC_Off     (0)                                   </span></div><div class="line"><a name="l01665"></a><span class="lineno"> 1665</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_FOSCSRC_OscIn   (1)                                   </span></div><div class="line"><a name="l01666"></a><span class="lineno"> 1666</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_FOSCSRC_Int2MHz (2)                                   </span></div><div class="line"><a name="l01669"></a><span class="lineno"> 1669</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field OSCIODIR: OSCIO pin function (Cf. �4.8). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01670"></a><span class="lineno"> 1670</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_OSCIODIR_Pos    (4)                                    </span></div><div class="line"><a name="l01671"></a><span class="lineno"> 1671</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_OSCIODIR_Msk    (0x1 &lt;&lt; DRV_SX1509_CLOCK_OSCIODIR_Pos) </span></div><div class="line"><a name="l01672"></a><span class="lineno"> 1672</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_OSCIODIR_Input  (0)                                    </span></div><div class="line"><a name="l01673"></a><span class="lineno"> 1673</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_OSCIODIR_Output (1)                                    </span></div><div class="line"><a name="l01676"></a><span class="lineno"> 1676</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field FREQ: Frequency of the signal output on OSCOUT pin, fOSCOUT = fOSC/(2^(RegClock[3:0]-1)). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01677"></a><span class="lineno"> 1677</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_FREQ_Pos   (0)                                </span></div><div class="line"><a name="l01678"></a><span class="lineno"> 1678</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_FREQ_Msk   (0xF &lt;&lt; DRV_SX1509_CLOCK_FREQ_Pos) </span></div><div class="line"><a name="l01679"></a><span class="lineno"> 1679</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_FREQ_Lo0Hz (0)                                </span></div><div class="line"><a name="l01680"></a><span class="lineno"> 1680</span>&#160;<span class="preprocessor">#define DRV_SX1509_CLOCK_FREQ_Hi0Hz (1)                                </span></div><div class="line"><a name="l01683"></a><span class="lineno"> 1683</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: MISC. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01684"></a><span class="lineno"> 1684</span>&#160;<span class="comment">/* Description: Miscellaneous device settings register. */</span></div><div class="line"><a name="l01685"></a><span class="lineno"> 1685</span>&#160;</div><div class="line"><a name="l01686"></a><span class="lineno"> 1686</span>&#160;</div><div class="line"><a name="l01687"></a><span class="lineno"> 1687</span>&#160;<span class="comment">/* Field MODE: LED Driver mode for Bank B&#39;s fading capable IOs (IO15-12). */</span></div><div class="line"><a name="l01688"></a><span class="lineno"> 1688</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_MODE_Pos         (7)                               </span></div><div class="line"><a name="l01689"></a><span class="lineno"> 1689</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_MODE_Msk         (0x1 &lt;&lt; DRV_SX1509_MISC_MODE_Pos) </span></div><div class="line"><a name="l01690"></a><span class="lineno"> 1690</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_MODE_Linear      (0)                               </span></div><div class="line"><a name="l01691"></a><span class="lineno"> 1691</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_MODE_Logarithmic (1)                               </span></div><div class="line"><a name="l01694"></a><span class="lineno"> 1694</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field CLKX: Frequency of the LED Driver clock ClkX of all IOs. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01695"></a><span class="lineno"> 1695</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_CLKX_Pos (4)                               </span></div><div class="line"><a name="l01696"></a><span class="lineno"> 1696</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_CLKX_Msk (0x7 &lt;&lt; DRV_SX1509_MISC_CLKX_Pos) </span></div><div class="line"><a name="l01697"></a><span class="lineno"> 1697</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_CLKX_Off (0)                               </span></div><div class="line"><a name="l01700"></a><span class="lineno"> 1700</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field DRVMODE: LED Driver mode for Bank A @s fading capable IOs (IO7-4). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01701"></a><span class="lineno"> 1701</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_DRVMODE_Pos         (3)                                  </span></div><div class="line"><a name="l01702"></a><span class="lineno"> 1702</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_DRVMODE_Msk         (0x1 &lt;&lt; DRV_SX1509_MISC_DRVMODE_Pos) </span></div><div class="line"><a name="l01703"></a><span class="lineno"> 1703</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_DRVMODE_Linear      (0)                                  </span></div><div class="line"><a name="l01704"></a><span class="lineno"> 1704</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_DRVMODE_Logarithmic (1)                                  </span></div><div class="line"><a name="l01707"></a><span class="lineno"> 1707</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field FUNC: NRESET pin function when externally forced low (Cf. �4.4.1 and �4.9.5). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01708"></a><span class="lineno"> 1708</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_FUNC_Pos    (2)                               </span></div><div class="line"><a name="l01709"></a><span class="lineno"> 1709</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_FUNC_Msk    (0x1 &lt;&lt; DRV_SX1509_MISC_FUNC_Pos) </span></div><div class="line"><a name="l01710"></a><span class="lineno"> 1710</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_FUNC_EqPOR  (0)                               </span></div><div class="line"><a name="l01711"></a><span class="lineno"> 1711</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_FUNC_Lmited (1)                               </span></div><div class="line"><a name="l01714"></a><span class="lineno"> 1714</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field AUTOINC: Auto-increment register address (Cf. �4.5). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01715"></a><span class="lineno"> 1715</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_AUTOINC_Pos (1)                                  </span></div><div class="line"><a name="l01716"></a><span class="lineno"> 1716</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_AUTOINC_Msk (0x1 &lt;&lt; DRV_SX1509_MISC_AUTOINC_Pos) </span></div><div class="line"><a name="l01717"></a><span class="lineno"> 1717</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_AUTOINC_On  (0)                                  </span></div><div class="line"><a name="l01718"></a><span class="lineno"> 1718</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_AUTOINC_Off (1)                                  </span></div><div class="line"><a name="l01721"></a><span class="lineno"> 1721</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field AUTOCLR: Autoclear NINT on RegData read (Cf. �4.7). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01722"></a><span class="lineno"> 1722</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_AUTOCLR_Pos (0)                                  </span></div><div class="line"><a name="l01723"></a><span class="lineno"> 1723</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_AUTOCLR_Msk (0x1 &lt;&lt; DRV_SX1509_MISC_AUTOCLR_Pos) </span></div><div class="line"><a name="l01724"></a><span class="lineno"> 1724</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_AUTOCLR_On  (0)                                  </span></div><div class="line"><a name="l01725"></a><span class="lineno"> 1725</span>&#160;<span class="preprocessor">#define DRV_SX1509_MISC_AUTOCLR_Off (1)                                  </span></div><div class="line"><a name="l01728"></a><span class="lineno"> 1728</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: LEDDRIVERENABLE. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01729"></a><span class="lineno"> 1729</span>&#160;<span class="comment">/* Description: LED driver enable register - I/O[n]. */</span></div><div class="line"><a name="l01730"></a><span class="lineno"> 1730</span>&#160;</div><div class="line"><a name="l01731"></a><span class="lineno"> 1731</span>&#160;</div><div class="line"><a name="l01732"></a><span class="lineno"> 1732</span>&#160;<span class="comment">/* Field PIN15: Enables LED Driver for each [output-configured] IO. */</span></div><div class="line"><a name="l01733"></a><span class="lineno"> 1733</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN15_Pos      (15)                                          </span></div><div class="line"><a name="l01734"></a><span class="lineno"> 1734</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN15_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN15_Pos) </span></div><div class="line"><a name="l01735"></a><span class="lineno"> 1735</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN15_Disabled (0)                                           </span></div><div class="line"><a name="l01736"></a><span class="lineno"> 1736</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN15_Enabled  (1)                                           </span></div><div class="line"><a name="l01739"></a><span class="lineno"> 1739</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01740"></a><span class="lineno"> 1740</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN14_Pos      (14)                                          </span></div><div class="line"><a name="l01741"></a><span class="lineno"> 1741</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN14_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN14_Pos) </span></div><div class="line"><a name="l01742"></a><span class="lineno"> 1742</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN14_Disabled (0)                                           </span></div><div class="line"><a name="l01743"></a><span class="lineno"> 1743</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN14_Enabled  (1)                                           </span></div><div class="line"><a name="l01746"></a><span class="lineno"> 1746</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01747"></a><span class="lineno"> 1747</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN13_Pos      (13)                                          </span></div><div class="line"><a name="l01748"></a><span class="lineno"> 1748</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN13_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN13_Pos) </span></div><div class="line"><a name="l01749"></a><span class="lineno"> 1749</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN13_Disabled (0)                                           </span></div><div class="line"><a name="l01750"></a><span class="lineno"> 1750</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN13_Enabled  (1)                                           </span></div><div class="line"><a name="l01753"></a><span class="lineno"> 1753</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01754"></a><span class="lineno"> 1754</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN12_Pos      (12)                                          </span></div><div class="line"><a name="l01755"></a><span class="lineno"> 1755</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN12_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN12_Pos) </span></div><div class="line"><a name="l01756"></a><span class="lineno"> 1756</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN12_Disabled (0)                                           </span></div><div class="line"><a name="l01757"></a><span class="lineno"> 1757</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN12_Enabled  (1)                                           </span></div><div class="line"><a name="l01760"></a><span class="lineno"> 1760</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01761"></a><span class="lineno"> 1761</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN11_Pos      (11)                                          </span></div><div class="line"><a name="l01762"></a><span class="lineno"> 1762</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN11_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN11_Pos) </span></div><div class="line"><a name="l01763"></a><span class="lineno"> 1763</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN11_Disabled (0)                                           </span></div><div class="line"><a name="l01764"></a><span class="lineno"> 1764</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN11_Enabled  (1)                                           </span></div><div class="line"><a name="l01767"></a><span class="lineno"> 1767</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01768"></a><span class="lineno"> 1768</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN10_Pos      (10)                                          </span></div><div class="line"><a name="l01769"></a><span class="lineno"> 1769</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN10_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN10_Pos) </span></div><div class="line"><a name="l01770"></a><span class="lineno"> 1770</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN10_Disabled (0)                                           </span></div><div class="line"><a name="l01771"></a><span class="lineno"> 1771</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN10_Enabled  (1)                                           </span></div><div class="line"><a name="l01774"></a><span class="lineno"> 1774</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01775"></a><span class="lineno"> 1775</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN9_Pos      (9)                                          </span></div><div class="line"><a name="l01776"></a><span class="lineno"> 1776</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN9_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN9_Pos) </span></div><div class="line"><a name="l01777"></a><span class="lineno"> 1777</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN9_Disabled (0)                                          </span></div><div class="line"><a name="l01778"></a><span class="lineno"> 1778</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN9_Enabled  (1)                                          </span></div><div class="line"><a name="l01781"></a><span class="lineno"> 1781</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01782"></a><span class="lineno"> 1782</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN8_Pos      (8)                                          </span></div><div class="line"><a name="l01783"></a><span class="lineno"> 1783</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN8_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN8_Pos) </span></div><div class="line"><a name="l01784"></a><span class="lineno"> 1784</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN8_Disabled (0)                                          </span></div><div class="line"><a name="l01785"></a><span class="lineno"> 1785</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN8_Enabled  (1)                                          </span></div><div class="line"><a name="l01788"></a><span class="lineno"> 1788</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01789"></a><span class="lineno"> 1789</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN7_Pos      (7)                                          </span></div><div class="line"><a name="l01790"></a><span class="lineno"> 1790</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN7_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN7_Pos) </span></div><div class="line"><a name="l01791"></a><span class="lineno"> 1791</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN7_Disabled (0)                                          </span></div><div class="line"><a name="l01792"></a><span class="lineno"> 1792</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN7_Enabled  (1)                                          </span></div><div class="line"><a name="l01795"></a><span class="lineno"> 1795</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01796"></a><span class="lineno"> 1796</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN6_Pos      (6)                                          </span></div><div class="line"><a name="l01797"></a><span class="lineno"> 1797</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN6_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN6_Pos) </span></div><div class="line"><a name="l01798"></a><span class="lineno"> 1798</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN6_Disabled (0)                                          </span></div><div class="line"><a name="l01799"></a><span class="lineno"> 1799</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN6_Enabled  (1)                                          </span></div><div class="line"><a name="l01802"></a><span class="lineno"> 1802</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01803"></a><span class="lineno"> 1803</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN5_Pos      (5)                                          </span></div><div class="line"><a name="l01804"></a><span class="lineno"> 1804</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN5_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN5_Pos) </span></div><div class="line"><a name="l01805"></a><span class="lineno"> 1805</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN5_Disabled (0)                                          </span></div><div class="line"><a name="l01806"></a><span class="lineno"> 1806</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN5_Enabled  (1)                                          </span></div><div class="line"><a name="l01809"></a><span class="lineno"> 1809</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01810"></a><span class="lineno"> 1810</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN4_Pos      (4)                                          </span></div><div class="line"><a name="l01811"></a><span class="lineno"> 1811</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN4_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN4_Pos) </span></div><div class="line"><a name="l01812"></a><span class="lineno"> 1812</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN4_Disabled (0)                                          </span></div><div class="line"><a name="l01813"></a><span class="lineno"> 1813</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN4_Enabled  (1)                                          </span></div><div class="line"><a name="l01816"></a><span class="lineno"> 1816</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01817"></a><span class="lineno"> 1817</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN3_Pos      (3)                                          </span></div><div class="line"><a name="l01818"></a><span class="lineno"> 1818</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN3_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN3_Pos) </span></div><div class="line"><a name="l01819"></a><span class="lineno"> 1819</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN3_Disabled (0)                                          </span></div><div class="line"><a name="l01820"></a><span class="lineno"> 1820</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN3_Enabled  (1)                                          </span></div><div class="line"><a name="l01823"></a><span class="lineno"> 1823</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01824"></a><span class="lineno"> 1824</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN2_Pos      (2)                                          </span></div><div class="line"><a name="l01825"></a><span class="lineno"> 1825</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN2_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN2_Pos) </span></div><div class="line"><a name="l01826"></a><span class="lineno"> 1826</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN2_Disabled (0)                                          </span></div><div class="line"><a name="l01827"></a><span class="lineno"> 1827</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN2_Enabled  (1)                                          </span></div><div class="line"><a name="l01830"></a><span class="lineno"> 1830</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01831"></a><span class="lineno"> 1831</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN1_Pos      (1)                                          </span></div><div class="line"><a name="l01832"></a><span class="lineno"> 1832</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN1_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN1_Pos) </span></div><div class="line"><a name="l01833"></a><span class="lineno"> 1833</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN1_Disabled (0)                                          </span></div><div class="line"><a name="l01834"></a><span class="lineno"> 1834</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN1_Enabled  (1)                                          </span></div><div class="line"><a name="l01837"></a><span class="lineno"> 1837</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Enables LED Driver for each [output-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01838"></a><span class="lineno"> 1838</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN0_Pos      (0)                                          </span></div><div class="line"><a name="l01839"></a><span class="lineno"> 1839</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN0_Msk      (0x1 &lt;&lt; DRV_SX1509_LEDDRIVERENABLE_PIN0_Pos) </span></div><div class="line"><a name="l01840"></a><span class="lineno"> 1840</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN0_Disabled (0)                                          </span></div><div class="line"><a name="l01841"></a><span class="lineno"> 1841</span>&#160;<span class="preprocessor">#define DRV_SX1509_LEDDRIVERENABLE_PIN0_Enabled  (1)                                          </span></div><div class="line"><a name="l01844"></a><span class="lineno"> 1844</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: DEBOUNCECONFIG. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01845"></a><span class="lineno"> 1845</span>&#160;<span class="comment">/* Description: Debounce configuration register. */</span></div><div class="line"><a name="l01846"></a><span class="lineno"> 1846</span>&#160;</div><div class="line"><a name="l01847"></a><span class="lineno"> 1847</span>&#160;</div><div class="line"><a name="l01848"></a><span class="lineno"> 1848</span>&#160;<span class="comment">/* Field RESERVED0: Unused field. */</span></div><div class="line"><a name="l01849"></a><span class="lineno"> 1849</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCECONFIG_RESERVED0_Pos (3)                                               </span></div><div class="line"><a name="l01850"></a><span class="lineno"> 1850</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCECONFIG_RESERVED0_Msk (0x1F &lt;&lt; DRV_SX1509_DEBOUNCECONFIG_RESERVED0_Pos) </span></div><div class="line"><a name="l01853"></a><span class="lineno"> 1853</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field TIME: Debounce time (Cf. �4.6.1). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01854"></a><span class="lineno"> 1854</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCECONFIG_TIME_Pos  (0)                                         </span></div><div class="line"><a name="l01855"></a><span class="lineno"> 1855</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCECONFIG_TIME_Msk  (0x7 &lt;&lt; DRV_SX1509_DEBOUNCECONFIG_TIME_Pos) </span></div><div class="line"><a name="l01856"></a><span class="lineno"> 1856</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCECONFIG_TIME_0ms5 (0)                                         </span></div><div class="line"><a name="l01857"></a><span class="lineno"> 1857</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCECONFIG_TIME_1ms  (1)                                         </span></div><div class="line"><a name="l01858"></a><span class="lineno"> 1858</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCECONFIG_TIME_2ms  (2)                                         </span></div><div class="line"><a name="l01859"></a><span class="lineno"> 1859</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCECONFIG_TIME_4ms  (3)                                         </span></div><div class="line"><a name="l01860"></a><span class="lineno"> 1860</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCECONFIG_TIME_8ms  (4)                                         </span></div><div class="line"><a name="l01861"></a><span class="lineno"> 1861</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCECONFIG_TIME_16ms (5)                                         </span></div><div class="line"><a name="l01862"></a><span class="lineno"> 1862</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCECONFIG_TIME_32ms (6)                                         </span></div><div class="line"><a name="l01863"></a><span class="lineno"> 1863</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCECONFIG_TIME_64ms (7)                                         </span></div><div class="line"><a name="l01866"></a><span class="lineno"> 1866</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: DEBOUNCEENABLE. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01867"></a><span class="lineno"> 1867</span>&#160;<span class="comment">/* Description: Debounce enable register - I/O[n]. */</span></div><div class="line"><a name="l01868"></a><span class="lineno"> 1868</span>&#160;</div><div class="line"><a name="l01869"></a><span class="lineno"> 1869</span>&#160;</div><div class="line"><a name="l01870"></a><span class="lineno"> 1870</span>&#160;<span class="comment">/* Field PIN15: Enables debouncing for each [input-configured] IO. */</span></div><div class="line"><a name="l01871"></a><span class="lineno"> 1871</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN15_Pos      (15)                                         </span></div><div class="line"><a name="l01872"></a><span class="lineno"> 1872</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN15_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN15_Pos) </span></div><div class="line"><a name="l01873"></a><span class="lineno"> 1873</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN15_Disabled (0)                                          </span></div><div class="line"><a name="l01874"></a><span class="lineno"> 1874</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN15_Enabled  (1)                                          </span></div><div class="line"><a name="l01877"></a><span class="lineno"> 1877</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01878"></a><span class="lineno"> 1878</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN14_Pos      (14)                                         </span></div><div class="line"><a name="l01879"></a><span class="lineno"> 1879</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN14_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN14_Pos) </span></div><div class="line"><a name="l01880"></a><span class="lineno"> 1880</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN14_Disabled (0)                                          </span></div><div class="line"><a name="l01881"></a><span class="lineno"> 1881</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN14_Enabled  (1)                                          </span></div><div class="line"><a name="l01884"></a><span class="lineno"> 1884</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01885"></a><span class="lineno"> 1885</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN13_Pos      (13)                                         </span></div><div class="line"><a name="l01886"></a><span class="lineno"> 1886</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN13_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN13_Pos) </span></div><div class="line"><a name="l01887"></a><span class="lineno"> 1887</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN13_Disabled (0)                                          </span></div><div class="line"><a name="l01888"></a><span class="lineno"> 1888</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN13_Enabled  (1)                                          </span></div><div class="line"><a name="l01891"></a><span class="lineno"> 1891</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01892"></a><span class="lineno"> 1892</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN12_Pos      (12)                                         </span></div><div class="line"><a name="l01893"></a><span class="lineno"> 1893</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN12_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN12_Pos) </span></div><div class="line"><a name="l01894"></a><span class="lineno"> 1894</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN12_Disabled (0)                                          </span></div><div class="line"><a name="l01895"></a><span class="lineno"> 1895</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN12_Enabled  (1)                                          </span></div><div class="line"><a name="l01898"></a><span class="lineno"> 1898</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01899"></a><span class="lineno"> 1899</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN11_Pos      (11)                                         </span></div><div class="line"><a name="l01900"></a><span class="lineno"> 1900</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN11_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN11_Pos) </span></div><div class="line"><a name="l01901"></a><span class="lineno"> 1901</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN11_Disabled (0)                                          </span></div><div class="line"><a name="l01902"></a><span class="lineno"> 1902</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN11_Enabled  (1)                                          </span></div><div class="line"><a name="l01905"></a><span class="lineno"> 1905</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01906"></a><span class="lineno"> 1906</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN10_Pos      (10)                                         </span></div><div class="line"><a name="l01907"></a><span class="lineno"> 1907</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN10_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN10_Pos) </span></div><div class="line"><a name="l01908"></a><span class="lineno"> 1908</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN10_Disabled (0)                                          </span></div><div class="line"><a name="l01909"></a><span class="lineno"> 1909</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN10_Enabled  (1)                                          </span></div><div class="line"><a name="l01912"></a><span class="lineno"> 1912</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01913"></a><span class="lineno"> 1913</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN9_Pos      (9)                                         </span></div><div class="line"><a name="l01914"></a><span class="lineno"> 1914</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN9_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN9_Pos) </span></div><div class="line"><a name="l01915"></a><span class="lineno"> 1915</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN9_Disabled (0)                                         </span></div><div class="line"><a name="l01916"></a><span class="lineno"> 1916</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN9_Enabled  (1)                                         </span></div><div class="line"><a name="l01919"></a><span class="lineno"> 1919</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01920"></a><span class="lineno"> 1920</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN8_Pos      (8)                                         </span></div><div class="line"><a name="l01921"></a><span class="lineno"> 1921</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN8_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN8_Pos) </span></div><div class="line"><a name="l01922"></a><span class="lineno"> 1922</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN8_Disabled (0)                                         </span></div><div class="line"><a name="l01923"></a><span class="lineno"> 1923</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN8_Enabled  (1)                                         </span></div><div class="line"><a name="l01926"></a><span class="lineno"> 1926</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01927"></a><span class="lineno"> 1927</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN7_Pos      (7)                                         </span></div><div class="line"><a name="l01928"></a><span class="lineno"> 1928</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN7_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN7_Pos) </span></div><div class="line"><a name="l01929"></a><span class="lineno"> 1929</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN7_Disabled (0)                                         </span></div><div class="line"><a name="l01930"></a><span class="lineno"> 1930</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN7_Enabled  (1)                                         </span></div><div class="line"><a name="l01933"></a><span class="lineno"> 1933</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01934"></a><span class="lineno"> 1934</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN6_Pos      (6)                                         </span></div><div class="line"><a name="l01935"></a><span class="lineno"> 1935</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN6_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN6_Pos) </span></div><div class="line"><a name="l01936"></a><span class="lineno"> 1936</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN6_Disabled (0)                                         </span></div><div class="line"><a name="l01937"></a><span class="lineno"> 1937</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN6_Enabled  (1)                                         </span></div><div class="line"><a name="l01940"></a><span class="lineno"> 1940</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01941"></a><span class="lineno"> 1941</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN5_Pos      (5)                                         </span></div><div class="line"><a name="l01942"></a><span class="lineno"> 1942</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN5_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN5_Pos) </span></div><div class="line"><a name="l01943"></a><span class="lineno"> 1943</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN5_Disabled (0)                                         </span></div><div class="line"><a name="l01944"></a><span class="lineno"> 1944</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN5_Enabled  (1)                                         </span></div><div class="line"><a name="l01947"></a><span class="lineno"> 1947</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01948"></a><span class="lineno"> 1948</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN4_Pos      (4)                                         </span></div><div class="line"><a name="l01949"></a><span class="lineno"> 1949</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN4_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN4_Pos) </span></div><div class="line"><a name="l01950"></a><span class="lineno"> 1950</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN4_Disabled (0)                                         </span></div><div class="line"><a name="l01951"></a><span class="lineno"> 1951</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN4_Enabled  (1)                                         </span></div><div class="line"><a name="l01954"></a><span class="lineno"> 1954</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01955"></a><span class="lineno"> 1955</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN3_Pos      (3)                                         </span></div><div class="line"><a name="l01956"></a><span class="lineno"> 1956</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN3_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN3_Pos) </span></div><div class="line"><a name="l01957"></a><span class="lineno"> 1957</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN3_Disabled (0)                                         </span></div><div class="line"><a name="l01958"></a><span class="lineno"> 1958</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN3_Enabled  (1)                                         </span></div><div class="line"><a name="l01961"></a><span class="lineno"> 1961</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01962"></a><span class="lineno"> 1962</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN2_Pos      (2)                                         </span></div><div class="line"><a name="l01963"></a><span class="lineno"> 1963</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN2_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN2_Pos) </span></div><div class="line"><a name="l01964"></a><span class="lineno"> 1964</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN2_Disabled (0)                                         </span></div><div class="line"><a name="l01965"></a><span class="lineno"> 1965</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN2_Enabled  (1)                                         </span></div><div class="line"><a name="l01968"></a><span class="lineno"> 1968</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01969"></a><span class="lineno"> 1969</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN1_Pos      (1)                                         </span></div><div class="line"><a name="l01970"></a><span class="lineno"> 1970</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN1_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN1_Pos) </span></div><div class="line"><a name="l01971"></a><span class="lineno"> 1971</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN1_Disabled (0)                                         </span></div><div class="line"><a name="l01972"></a><span class="lineno"> 1972</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN1_Enabled  (1)                                         </span></div><div class="line"><a name="l01975"></a><span class="lineno"> 1975</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Enables debouncing for each [input-configured] IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01976"></a><span class="lineno"> 1976</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN0_Pos      (0)                                         </span></div><div class="line"><a name="l01977"></a><span class="lineno"> 1977</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN0_Msk      (0x1 &lt;&lt; DRV_SX1509_DEBOUNCEENABLE_PIN0_Pos) </span></div><div class="line"><a name="l01978"></a><span class="lineno"> 1978</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN0_Disabled (0)                                         </span></div><div class="line"><a name="l01979"></a><span class="lineno"> 1979</span>&#160;<span class="preprocessor">#define DRV_SX1509_DEBOUNCEENABLE_PIN0_Enabled  (1)                                         </span></div><div class="line"><a name="l01982"></a><span class="lineno"> 1982</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: KEYCONFIG. */</span><span class="preprocessor"></span></div><div class="line"><a name="l01983"></a><span class="lineno"> 1983</span>&#160;<span class="comment">/* Description: Key scan configuration register. */</span></div><div class="line"><a name="l01984"></a><span class="lineno"> 1984</span>&#160;</div><div class="line"><a name="l01985"></a><span class="lineno"> 1985</span>&#160;</div><div class="line"><a name="l01986"></a><span class="lineno"> 1986</span>&#160;<span class="comment">/* Field RESERVED2: Unused field. */</span></div><div class="line"><a name="l01987"></a><span class="lineno"> 1987</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_RESERVED2_Pos (15)                                        </span></div><div class="line"><a name="l01988"></a><span class="lineno"> 1988</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_RESERVED2_Msk (0x1 &lt;&lt; DRV_SX1509_KEYCONFIG_RESERVED2_Pos) </span></div><div class="line"><a name="l01991"></a><span class="lineno"> 1991</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field AUTOSLEEPTIME: Auto Sleep time (no key press within this time will set keypad engine to sleep). */</span><span class="preprocessor"></span></div><div class="line"><a name="l01992"></a><span class="lineno"> 1992</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_AUTOSLEEPTIME_Pos   (12)                                            </span></div><div class="line"><a name="l01993"></a><span class="lineno"> 1993</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_AUTOSLEEPTIME_Msk   (0x7 &lt;&lt; DRV_SX1509_KEYCONFIG_AUTOSLEEPTIME_Pos) </span></div><div class="line"><a name="l01994"></a><span class="lineno"> 1994</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_AUTOSLEEPTIME_Off   (0)                                             </span></div><div class="line"><a name="l01995"></a><span class="lineno"> 1995</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_AUTOSLEEPTIME_128ms (1)                                             </span></div><div class="line"><a name="l01996"></a><span class="lineno"> 1996</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_AUTOSLEEPTIME_256ms (2)                                             </span></div><div class="line"><a name="l01997"></a><span class="lineno"> 1997</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_AUTOSLEEPTIME_512ms (3)                                             </span></div><div class="line"><a name="l01998"></a><span class="lineno"> 1998</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_AUTOSLEEPTIME_1s    (4)                                             </span></div><div class="line"><a name="l01999"></a><span class="lineno"> 1999</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_AUTOSLEEPTIME_2s    (5)                                             </span></div><div class="line"><a name="l02000"></a><span class="lineno"> 2000</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_AUTOSLEEPTIME_4s    (6)                                             </span></div><div class="line"><a name="l02001"></a><span class="lineno"> 2001</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_AUTOSLEEPTIME_8s    (7)                                             </span></div><div class="line"><a name="l02004"></a><span class="lineno"> 2004</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field RESERVED1: Unused field. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02005"></a><span class="lineno"> 2005</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_RESERVED1_Pos (11)                                        </span></div><div class="line"><a name="l02006"></a><span class="lineno"> 2006</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_RESERVED1_Msk (0x1 &lt;&lt; DRV_SX1509_KEYCONFIG_RESERVED1_Pos) </span></div><div class="line"><a name="l02009"></a><span class="lineno"> 2009</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field SCANTIME: Scan time per row (must be set above debounce time). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02010"></a><span class="lineno"> 2010</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_SCANTIME_Pos   (8)                                        </span></div><div class="line"><a name="l02011"></a><span class="lineno"> 2011</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_SCANTIME_Msk   (0x7 &lt;&lt; DRV_SX1509_KEYCONFIG_SCANTIME_Pos) </span></div><div class="line"><a name="l02012"></a><span class="lineno"> 2012</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_SCANTIME_1ms   (0)                                        </span></div><div class="line"><a name="l02013"></a><span class="lineno"> 2013</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_SCANTIME_2ms   (1)                                        </span></div><div class="line"><a name="l02014"></a><span class="lineno"> 2014</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_SCANTIME_4ms   (2)                                        </span></div><div class="line"><a name="l02015"></a><span class="lineno"> 2015</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_SCANTIME_8ms   (3)                                        </span></div><div class="line"><a name="l02016"></a><span class="lineno"> 2016</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_SCANTIME_16ms  (4)                                        </span></div><div class="line"><a name="l02017"></a><span class="lineno"> 2017</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_SCANTIME_32ms  (5)                                        </span></div><div class="line"><a name="l02018"></a><span class="lineno"> 2018</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_SCANTIME_64ms  (6)                                        </span></div><div class="line"><a name="l02019"></a><span class="lineno"> 2019</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_SCANTIME_128ms (7)                                        </span></div><div class="line"><a name="l02022"></a><span class="lineno"> 2022</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field RESERVED0: Unused field. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02023"></a><span class="lineno"> 2023</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_RESERVED0_Pos (6)                                         </span></div><div class="line"><a name="l02024"></a><span class="lineno"> 2024</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_RESERVED0_Msk (0x3 &lt;&lt; DRV_SX1509_KEYCONFIG_RESERVED0_Pos) </span></div><div class="line"><a name="l02027"></a><span class="lineno"> 2027</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field ROWS: Number of rows (outputs) + key scan enable. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02028"></a><span class="lineno"> 2028</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_ROWS_Pos   (3)                                    </span></div><div class="line"><a name="l02029"></a><span class="lineno"> 2029</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_ROWS_Msk   (0x7 &lt;&lt; DRV_SX1509_KEYCONFIG_ROWS_Pos) </span></div><div class="line"><a name="l02030"></a><span class="lineno"> 2030</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_ROWS_Off   (0)                                    </span></div><div class="line"><a name="l02031"></a><span class="lineno"> 2031</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_ROWS_2Rows (1)                                    </span></div><div class="line"><a name="l02032"></a><span class="lineno"> 2032</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_ROWS_3Rows (2)                                    </span></div><div class="line"><a name="l02033"></a><span class="lineno"> 2033</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_ROWS_4Rows (3)                                    </span></div><div class="line"><a name="l02034"></a><span class="lineno"> 2034</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_ROWS_5Rows (4)                                    </span></div><div class="line"><a name="l02035"></a><span class="lineno"> 2035</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_ROWS_6Rows (5)                                    </span></div><div class="line"><a name="l02036"></a><span class="lineno"> 2036</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_ROWS_7Rows (6)                                    </span></div><div class="line"><a name="l02037"></a><span class="lineno"> 2037</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_ROWS_8Rows (7)                                    </span></div><div class="line"><a name="l02040"></a><span class="lineno"> 2040</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field COLS: Number of columns (inputs). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02041"></a><span class="lineno"> 2041</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_COLS_Pos   (0)                                    </span></div><div class="line"><a name="l02042"></a><span class="lineno"> 2042</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_COLS_Msk   (0x7 &lt;&lt; DRV_SX1509_KEYCONFIG_COLS_Pos) </span></div><div class="line"><a name="l02043"></a><span class="lineno"> 2043</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_COLS_1Col  (0)                                    </span></div><div class="line"><a name="l02044"></a><span class="lineno"> 2044</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_COLS_2Cols (1)                                    </span></div><div class="line"><a name="l02045"></a><span class="lineno"> 2045</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_COLS_3Cols (2)                                    </span></div><div class="line"><a name="l02046"></a><span class="lineno"> 2046</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_COLS_4Cols (3)                                    </span></div><div class="line"><a name="l02047"></a><span class="lineno"> 2047</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_COLS_5Cols (4)                                    </span></div><div class="line"><a name="l02048"></a><span class="lineno"> 2048</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_COLS_6Cols (5)                                    </span></div><div class="line"><a name="l02049"></a><span class="lineno"> 2049</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_COLS_7Cols (6)                                    </span></div><div class="line"><a name="l02050"></a><span class="lineno"> 2050</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYCONFIG_COLS_8Cols (7)                                    </span></div><div class="line"><a name="l02053"></a><span class="lineno"> 2053</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: KEYDATA. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02054"></a><span class="lineno"> 2054</span>&#160;<span class="comment">/* Description: Key value. */</span></div><div class="line"><a name="l02055"></a><span class="lineno"> 2055</span>&#160;</div><div class="line"><a name="l02056"></a><span class="lineno"> 2056</span>&#160;</div><div class="line"><a name="l02057"></a><span class="lineno"> 2057</span>&#160;<span class="comment">/* Field COLINTR7: Column which generated NINT (active low in HW, intentionally active high through driver interface). */</span></div><div class="line"><a name="l02058"></a><span class="lineno"> 2058</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR7_Pos       (15)                                     </span></div><div class="line"><a name="l02059"></a><span class="lineno"> 2059</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR7_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_COLINTR7_Pos) </span></div><div class="line"><a name="l02060"></a><span class="lineno"> 2060</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR7_None      (0)                                      </span></div><div class="line"><a name="l02061"></a><span class="lineno"> 2061</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR7_Triggered (1)                                      </span></div><div class="line"><a name="l02064"></a><span class="lineno"> 2064</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field COLINTR6: Column which generated NINT (active low in HW, intentionally active high through driver interface). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02065"></a><span class="lineno"> 2065</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR6_Pos       (14)                                     </span></div><div class="line"><a name="l02066"></a><span class="lineno"> 2066</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR6_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_COLINTR6_Pos) </span></div><div class="line"><a name="l02067"></a><span class="lineno"> 2067</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR6_None      (0)                                      </span></div><div class="line"><a name="l02068"></a><span class="lineno"> 2068</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR6_Triggered (1)                                      </span></div><div class="line"><a name="l02071"></a><span class="lineno"> 2071</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field COLINTR5: Column which generated NINT (active low in HW, intentionally active high through driver interface). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02072"></a><span class="lineno"> 2072</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR5_Pos       (13)                                     </span></div><div class="line"><a name="l02073"></a><span class="lineno"> 2073</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR5_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_COLINTR5_Pos) </span></div><div class="line"><a name="l02074"></a><span class="lineno"> 2074</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR5_None      (0)                                      </span></div><div class="line"><a name="l02075"></a><span class="lineno"> 2075</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR5_Triggered (1)                                      </span></div><div class="line"><a name="l02078"></a><span class="lineno"> 2078</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field COLINTR4: Column which generated NINT (active low in HW, intentionally active high through driver interface). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02079"></a><span class="lineno"> 2079</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR4_Pos       (12)                                     </span></div><div class="line"><a name="l02080"></a><span class="lineno"> 2080</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR4_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_COLINTR4_Pos) </span></div><div class="line"><a name="l02081"></a><span class="lineno"> 2081</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR4_None      (0)                                      </span></div><div class="line"><a name="l02082"></a><span class="lineno"> 2082</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR4_Triggered (1)                                      </span></div><div class="line"><a name="l02085"></a><span class="lineno"> 2085</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field COLINTR3: Column which generated NINT (active low in HW, intentionally active high through driver interface). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02086"></a><span class="lineno"> 2086</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR3_Pos       (11)                                     </span></div><div class="line"><a name="l02087"></a><span class="lineno"> 2087</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR3_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_COLINTR3_Pos) </span></div><div class="line"><a name="l02088"></a><span class="lineno"> 2088</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR3_None      (0)                                      </span></div><div class="line"><a name="l02089"></a><span class="lineno"> 2089</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR3_Triggered (1)                                      </span></div><div class="line"><a name="l02092"></a><span class="lineno"> 2092</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field COLINTR2: Column which generated NINT (active low in HW, intentionally active high through driver interface). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02093"></a><span class="lineno"> 2093</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR2_Pos       (10)                                     </span></div><div class="line"><a name="l02094"></a><span class="lineno"> 2094</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR2_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_COLINTR2_Pos) </span></div><div class="line"><a name="l02095"></a><span class="lineno"> 2095</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR2_None      (0)                                      </span></div><div class="line"><a name="l02096"></a><span class="lineno"> 2096</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR2_Triggered (1)                                      </span></div><div class="line"><a name="l02099"></a><span class="lineno"> 2099</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field COLINTR1: Column which generated NINT (active low in HW, intentionally active high through driver interface). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02100"></a><span class="lineno"> 2100</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR1_Pos       (9)                                      </span></div><div class="line"><a name="l02101"></a><span class="lineno"> 2101</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR1_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_COLINTR1_Pos) </span></div><div class="line"><a name="l02102"></a><span class="lineno"> 2102</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR1_None      (0)                                      </span></div><div class="line"><a name="l02103"></a><span class="lineno"> 2103</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR1_Triggered (1)                                      </span></div><div class="line"><a name="l02106"></a><span class="lineno"> 2106</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field COLINTR0: Column which generated NINT (active low in HW, intentionally active high through driver interface). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02107"></a><span class="lineno"> 2107</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR0_Pos       (8)                                      </span></div><div class="line"><a name="l02108"></a><span class="lineno"> 2108</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR0_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_COLINTR0_Pos) </span></div><div class="line"><a name="l02109"></a><span class="lineno"> 2109</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR0_None      (0)                                      </span></div><div class="line"><a name="l02110"></a><span class="lineno"> 2110</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_COLINTR0_Triggered (1)                                      </span></div><div class="line"><a name="l02113"></a><span class="lineno"> 2113</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field ROWINTR7: Row which generated NINT (active low). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02114"></a><span class="lineno"> 2114</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR7_Pos       (7)                                      </span></div><div class="line"><a name="l02115"></a><span class="lineno"> 2115</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR7_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_ROWINTR7_Pos) </span></div><div class="line"><a name="l02116"></a><span class="lineno"> 2116</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR7_None      (0)                                      </span></div><div class="line"><a name="l02117"></a><span class="lineno"> 2117</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR7_Triggered (1)                                      </span></div><div class="line"><a name="l02120"></a><span class="lineno"> 2120</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field ROWINTR6: Row which generated NINT (active low). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02121"></a><span class="lineno"> 2121</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR6_Pos       (6)                                      </span></div><div class="line"><a name="l02122"></a><span class="lineno"> 2122</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR6_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_ROWINTR6_Pos) </span></div><div class="line"><a name="l02123"></a><span class="lineno"> 2123</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR6_None      (0)                                      </span></div><div class="line"><a name="l02124"></a><span class="lineno"> 2124</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR6_Triggered (1)                                      </span></div><div class="line"><a name="l02127"></a><span class="lineno"> 2127</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field ROWINTR5: Row which generated NINT (active low). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02128"></a><span class="lineno"> 2128</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR5_Pos       (5)                                      </span></div><div class="line"><a name="l02129"></a><span class="lineno"> 2129</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR5_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_ROWINTR5_Pos) </span></div><div class="line"><a name="l02130"></a><span class="lineno"> 2130</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR5_None      (0)                                      </span></div><div class="line"><a name="l02131"></a><span class="lineno"> 2131</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR5_Triggered (1)                                      </span></div><div class="line"><a name="l02134"></a><span class="lineno"> 2134</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field ROWINTR4: Row which generated NINT (active low). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02135"></a><span class="lineno"> 2135</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR4_Pos       (4)                                      </span></div><div class="line"><a name="l02136"></a><span class="lineno"> 2136</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR4_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_ROWINTR4_Pos) </span></div><div class="line"><a name="l02137"></a><span class="lineno"> 2137</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR4_None      (0)                                      </span></div><div class="line"><a name="l02138"></a><span class="lineno"> 2138</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR4_Triggered (1)                                      </span></div><div class="line"><a name="l02141"></a><span class="lineno"> 2141</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field ROWINTR3: Row which generated NINT (active low). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02142"></a><span class="lineno"> 2142</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR3_Pos       (3)                                      </span></div><div class="line"><a name="l02143"></a><span class="lineno"> 2143</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR3_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_ROWINTR3_Pos) </span></div><div class="line"><a name="l02144"></a><span class="lineno"> 2144</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR3_None      (0)                                      </span></div><div class="line"><a name="l02145"></a><span class="lineno"> 2145</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR3_Triggered (1)                                      </span></div><div class="line"><a name="l02148"></a><span class="lineno"> 2148</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field ROWINTR2: Row which generated NINT (active low). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02149"></a><span class="lineno"> 2149</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR2_Pos       (2)                                      </span></div><div class="line"><a name="l02150"></a><span class="lineno"> 2150</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR2_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_ROWINTR2_Pos) </span></div><div class="line"><a name="l02151"></a><span class="lineno"> 2151</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR2_None      (0)                                      </span></div><div class="line"><a name="l02152"></a><span class="lineno"> 2152</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR2_Triggered (1)                                      </span></div><div class="line"><a name="l02155"></a><span class="lineno"> 2155</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field ROWINTR1: Row which generated NINT (active low). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02156"></a><span class="lineno"> 2156</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR1_Pos       (1)                                      </span></div><div class="line"><a name="l02157"></a><span class="lineno"> 2157</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR1_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_ROWINTR1_Pos) </span></div><div class="line"><a name="l02158"></a><span class="lineno"> 2158</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR1_None      (0)                                      </span></div><div class="line"><a name="l02159"></a><span class="lineno"> 2159</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR1_Triggered (1)                                      </span></div><div class="line"><a name="l02162"></a><span class="lineno"> 2162</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field ROWINTR0: Row which generated NINT (active low). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02163"></a><span class="lineno"> 2163</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR0_Pos       (0)                                      </span></div><div class="line"><a name="l02164"></a><span class="lineno"> 2164</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR0_Msk       (0x1 &lt;&lt; DRV_SX1509_KEYDATA_ROWINTR0_Pos) </span></div><div class="line"><a name="l02165"></a><span class="lineno"> 2165</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR0_None      (0)                                      </span></div><div class="line"><a name="l02166"></a><span class="lineno"> 2166</span>&#160;<span class="preprocessor">#define DRV_SX1509_KEYDATA_ROWINTR0_Triggered (1)                                      </span></div><div class="line"><a name="l02169"></a><span class="lineno"> 2169</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: ONOFFCFGX. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02170"></a><span class="lineno"> 2170</span>&#160;<span class="comment">/* Description: ON/OFF time/intensity register for I/O[n]. */</span></div><div class="line"><a name="l02171"></a><span class="lineno"> 2171</span>&#160;</div><div class="line"><a name="l02172"></a><span class="lineno"> 2172</span>&#160;</div><div class="line"><a name="l02173"></a><span class="lineno"> 2173</span>&#160;<span class="comment">/* Field RESERVED0: Unused field. */</span></div><div class="line"><a name="l02174"></a><span class="lineno"> 2174</span>&#160;<span class="preprocessor">#define DRV_SX1509_ONOFFCFGX_RESERVED0_Pos (21)                                        </span></div><div class="line"><a name="l02175"></a><span class="lineno"> 2175</span>&#160;<span class="preprocessor">#define DRV_SX1509_ONOFFCFGX_RESERVED0_Msk (0x7 &lt;&lt; DRV_SX1509_ONOFFCFGX_RESERVED0_Pos) </span></div><div class="line"><a name="l02178"></a><span class="lineno"> 2178</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field ONTIME: ON Time of IO[n] (1 - 15 : TOnX = 64 * RegTOnX * (255/ClkX), 16 - 31 : TOnX = 512 * RegTOnX * (255/ClkX)). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02179"></a><span class="lineno"> 2179</span>&#160;<span class="preprocessor">#define DRV_SX1509_ONOFFCFGX_ONTIME_Pos      (16)                                      </span></div><div class="line"><a name="l02180"></a><span class="lineno"> 2180</span>&#160;<span class="preprocessor">#define DRV_SX1509_ONOFFCFGX_ONTIME_Msk      (0x1F &lt;&lt; DRV_SX1509_ONOFFCFGX_ONTIME_Pos) </span></div><div class="line"><a name="l02181"></a><span class="lineno"> 2181</span>&#160;<span class="preprocessor">#define DRV_SX1509_ONOFFCFGX_ONTIME_Infinite (0)                                       </span></div><div class="line"><a name="l02184"></a><span class="lineno"> 2184</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field ONINTENSITY: ON Intensity of IO[n] (Linear mode : IOnX = RegIOnN, Logarithmic mode (fading capable IOs only, Cf �4.9.5) : IOnN = f(RegIOnN)). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02185"></a><span class="lineno"> 2185</span>&#160;<span class="preprocessor">#define DRV_SX1509_ONOFFCFGX_ONINTENSITY_Pos (8)                                            </span></div><div class="line"><a name="l02186"></a><span class="lineno"> 2186</span>&#160;<span class="preprocessor">#define DRV_SX1509_ONOFFCFGX_ONINTENSITY_Msk (0xFF &lt;&lt; DRV_SX1509_ONOFFCFGX_ONINTENSITY_Pos) </span></div><div class="line"><a name="l02189"></a><span class="lineno"> 2189</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field OFFTIME: OFF Time of IO[n], (1 - 15 : TOffN = 64 * RegOffN[7:3] * (255/ClkN), 16 - 31 : TOffN = 512 * RegOffN[7:3] * (255/ClkN)). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02190"></a><span class="lineno"> 2190</span>&#160;<span class="preprocessor">#define DRV_SX1509_ONOFFCFGX_OFFTIME_Pos      (3)                                        </span></div><div class="line"><a name="l02191"></a><span class="lineno"> 2191</span>&#160;<span class="preprocessor">#define DRV_SX1509_ONOFFCFGX_OFFTIME_Msk      (0x1F &lt;&lt; DRV_SX1509_ONOFFCFGX_OFFTIME_Pos) </span></div><div class="line"><a name="l02192"></a><span class="lineno"> 2192</span>&#160;<span class="preprocessor">#define DRV_SX1509_ONOFFCFGX_OFFTIME_Infinite (0)                                        </span></div><div class="line"><a name="l02195"></a><span class="lineno"> 2195</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field OFFINTENSITY: OFF Intensity of IO[n] (Linear mode : IOffN = 4 x RegOff[2:0], Logarithmic mode (fading capable IOs only, Cf �4.9.5) : IOffN = f(4 x RegOffN[2:0])). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02196"></a><span class="lineno"> 2196</span>&#160;<span class="preprocessor">#define DRV_SX1509_ONOFFCFGX_OFFINTENSITY_Pos (0)                                            </span></div><div class="line"><a name="l02197"></a><span class="lineno"> 2197</span>&#160;<span class="preprocessor">#define DRV_SX1509_ONOFFCFGX_OFFINTENSITY_Msk (0x7 &lt;&lt; DRV_SX1509_ONOFFCFGX_OFFINTENSITY_Pos) </span></div><div class="line"><a name="l02200"></a><span class="lineno"> 2200</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: RISEFALLCFGX. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02201"></a><span class="lineno"> 2201</span>&#160;<span class="comment">/* Description: Fade configuration register for I/O[n]. */</span></div><div class="line"><a name="l02202"></a><span class="lineno"> 2202</span>&#160;</div><div class="line"><a name="l02203"></a><span class="lineno"> 2203</span>&#160;</div><div class="line"><a name="l02204"></a><span class="lineno"> 2204</span>&#160;<span class="comment">/* Field RESERVED1: Unused field. */</span></div><div class="line"><a name="l02205"></a><span class="lineno"> 2205</span>&#160;<span class="preprocessor">#define DRV_SX1509_RISEFALLCFGX_RESERVED1_Pos (13)                                           </span></div><div class="line"><a name="l02206"></a><span class="lineno"> 2206</span>&#160;<span class="preprocessor">#define DRV_SX1509_RISEFALLCFGX_RESERVED1_Msk (0x7 &lt;&lt; DRV_SX1509_RISEFALLCFGX_RESERVED1_Pos) </span></div><div class="line"><a name="l02209"></a><span class="lineno"> 2209</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field FADEIN: Fade In setting of IO[n], (1 - 15 : TRiseN = (RegIOnN-(4x&lt;OffIntensity&gt;)) * &lt;FadeIn&gt; * (255/ClkN) 16 - 31 : TRiseN = 16 * (&lt;OnTime&gt;-(4x&lt;OffIntensity&gt;)) * &lt;FadeIn&gt; * (255/ClkN)). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02210"></a><span class="lineno"> 2210</span>&#160;<span class="preprocessor">#define DRV_SX1509_RISEFALLCFGX_FADEIN_Pos (8)                                          </span></div><div class="line"><a name="l02211"></a><span class="lineno"> 2211</span>&#160;<span class="preprocessor">#define DRV_SX1509_RISEFALLCFGX_FADEIN_Msk (0x1F &lt;&lt; DRV_SX1509_RISEFALLCFGX_FADEIN_Pos) </span></div><div class="line"><a name="l02212"></a><span class="lineno"> 2212</span>&#160;<span class="preprocessor">#define DRV_SX1509_RISEFALLCFGX_FADEIN_Off (0)                                          </span></div><div class="line"><a name="l02215"></a><span class="lineno"> 2215</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field RESERVED0: Unused field. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02216"></a><span class="lineno"> 2216</span>&#160;<span class="preprocessor">#define DRV_SX1509_RISEFALLCFGX_RESERVED0_Pos (5)                                            </span></div><div class="line"><a name="l02217"></a><span class="lineno"> 2217</span>&#160;<span class="preprocessor">#define DRV_SX1509_RISEFALLCFGX_RESERVED0_Msk (0x7 &lt;&lt; DRV_SX1509_RISEFALLCFGX_RESERVED0_Pos) </span></div><div class="line"><a name="l02220"></a><span class="lineno"> 2220</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field FADEOUT: Fade Out setting of IO[n], (1 - 15 : TFallN = (RegIOnN-(4x&lt;OffIntensity&gt;)) * &lt;FadeOut&gt; * (255/ClkN) 16 - 31 : TFallN = 16 * (&lt;OnTime&gt;-(4x&lt;OffIntensity&gt;)) * &lt;FadeOut&gt; * (255/ClkN)). */</span><span class="preprocessor"></span></div><div class="line"><a name="l02221"></a><span class="lineno"> 2221</span>&#160;<span class="preprocessor">#define DRV_SX1509_RISEFALLCFGX_FADEOUT_Pos (0)                                           </span></div><div class="line"><a name="l02222"></a><span class="lineno"> 2222</span>&#160;<span class="preprocessor">#define DRV_SX1509_RISEFALLCFGX_FADEOUT_Msk (0x1F &lt;&lt; DRV_SX1509_RISEFALLCFGX_FADEOUT_Pos) </span></div><div class="line"><a name="l02223"></a><span class="lineno"> 2223</span>&#160;<span class="preprocessor">#define DRV_SX1509_RISEFALLCFGX_FADEOUT_Off (0)                                           </span></div><div class="line"><a name="l02226"></a><span class="lineno"> 2226</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: HIGHINPMODE. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02227"></a><span class="lineno"> 2227</span>&#160;<span class="comment">/* Description: High input enable register. */</span></div><div class="line"><a name="l02228"></a><span class="lineno"> 2228</span>&#160;</div><div class="line"><a name="l02229"></a><span class="lineno"> 2229</span>&#160;</div><div class="line"><a name="l02230"></a><span class="lineno"> 2230</span>&#160;<span class="comment">/* Field PIN15: Enables high input mode for each (input-configured) IO. */</span></div><div class="line"><a name="l02231"></a><span class="lineno"> 2231</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN15_Pos      (15)                                      </span></div><div class="line"><a name="l02232"></a><span class="lineno"> 2232</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN15_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN15_Pos) </span></div><div class="line"><a name="l02233"></a><span class="lineno"> 2233</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN15_Disabled (0)                                       </span></div><div class="line"><a name="l02234"></a><span class="lineno"> 2234</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN15_Enabled  (1)                                       </span></div><div class="line"><a name="l02237"></a><span class="lineno"> 2237</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN14: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02238"></a><span class="lineno"> 2238</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN14_Pos      (14)                                      </span></div><div class="line"><a name="l02239"></a><span class="lineno"> 2239</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN14_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN14_Pos) </span></div><div class="line"><a name="l02240"></a><span class="lineno"> 2240</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN14_Disabled (0)                                       </span></div><div class="line"><a name="l02241"></a><span class="lineno"> 2241</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN14_Enabled  (1)                                       </span></div><div class="line"><a name="l02244"></a><span class="lineno"> 2244</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN13: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02245"></a><span class="lineno"> 2245</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN13_Pos      (13)                                      </span></div><div class="line"><a name="l02246"></a><span class="lineno"> 2246</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN13_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN13_Pos) </span></div><div class="line"><a name="l02247"></a><span class="lineno"> 2247</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN13_Disabled (0)                                       </span></div><div class="line"><a name="l02248"></a><span class="lineno"> 2248</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN13_Enabled  (1)                                       </span></div><div class="line"><a name="l02251"></a><span class="lineno"> 2251</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN12: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02252"></a><span class="lineno"> 2252</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN12_Pos      (12)                                      </span></div><div class="line"><a name="l02253"></a><span class="lineno"> 2253</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN12_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN12_Pos) </span></div><div class="line"><a name="l02254"></a><span class="lineno"> 2254</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN12_Disabled (0)                                       </span></div><div class="line"><a name="l02255"></a><span class="lineno"> 2255</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN12_Enabled  (1)                                       </span></div><div class="line"><a name="l02258"></a><span class="lineno"> 2258</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN11: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02259"></a><span class="lineno"> 2259</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN11_Pos      (11)                                      </span></div><div class="line"><a name="l02260"></a><span class="lineno"> 2260</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN11_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN11_Pos) </span></div><div class="line"><a name="l02261"></a><span class="lineno"> 2261</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN11_Disabled (0)                                       </span></div><div class="line"><a name="l02262"></a><span class="lineno"> 2262</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN11_Enabled  (1)                                       </span></div><div class="line"><a name="l02265"></a><span class="lineno"> 2265</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN10: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02266"></a><span class="lineno"> 2266</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN10_Pos      (10)                                      </span></div><div class="line"><a name="l02267"></a><span class="lineno"> 2267</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN10_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN10_Pos) </span></div><div class="line"><a name="l02268"></a><span class="lineno"> 2268</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN10_Disabled (0)                                       </span></div><div class="line"><a name="l02269"></a><span class="lineno"> 2269</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN10_Enabled  (1)                                       </span></div><div class="line"><a name="l02272"></a><span class="lineno"> 2272</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN9: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02273"></a><span class="lineno"> 2273</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN9_Pos      (9)                                      </span></div><div class="line"><a name="l02274"></a><span class="lineno"> 2274</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN9_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN9_Pos) </span></div><div class="line"><a name="l02275"></a><span class="lineno"> 2275</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN9_Disabled (0)                                      </span></div><div class="line"><a name="l02276"></a><span class="lineno"> 2276</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN9_Enabled  (1)                                      </span></div><div class="line"><a name="l02279"></a><span class="lineno"> 2279</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN8: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02280"></a><span class="lineno"> 2280</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN8_Pos      (8)                                      </span></div><div class="line"><a name="l02281"></a><span class="lineno"> 2281</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN8_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN8_Pos) </span></div><div class="line"><a name="l02282"></a><span class="lineno"> 2282</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN8_Disabled (0)                                      </span></div><div class="line"><a name="l02283"></a><span class="lineno"> 2283</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN8_Enabled  (1)                                      </span></div><div class="line"><a name="l02286"></a><span class="lineno"> 2286</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN7: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02287"></a><span class="lineno"> 2287</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN7_Pos      (7)                                      </span></div><div class="line"><a name="l02288"></a><span class="lineno"> 2288</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN7_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN7_Pos) </span></div><div class="line"><a name="l02289"></a><span class="lineno"> 2289</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN7_Disabled (0)                                      </span></div><div class="line"><a name="l02290"></a><span class="lineno"> 2290</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN7_Enabled  (1)                                      </span></div><div class="line"><a name="l02293"></a><span class="lineno"> 2293</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN6: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02294"></a><span class="lineno"> 2294</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN6_Pos      (6)                                      </span></div><div class="line"><a name="l02295"></a><span class="lineno"> 2295</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN6_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN6_Pos) </span></div><div class="line"><a name="l02296"></a><span class="lineno"> 2296</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN6_Disabled (0)                                      </span></div><div class="line"><a name="l02297"></a><span class="lineno"> 2297</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN6_Enabled  (1)                                      </span></div><div class="line"><a name="l02300"></a><span class="lineno"> 2300</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN5: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02301"></a><span class="lineno"> 2301</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN5_Pos      (5)                                      </span></div><div class="line"><a name="l02302"></a><span class="lineno"> 2302</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN5_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN5_Pos) </span></div><div class="line"><a name="l02303"></a><span class="lineno"> 2303</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN5_Disabled (0)                                      </span></div><div class="line"><a name="l02304"></a><span class="lineno"> 2304</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN5_Enabled  (1)                                      </span></div><div class="line"><a name="l02307"></a><span class="lineno"> 2307</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN4: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02308"></a><span class="lineno"> 2308</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN4_Pos      (4)                                      </span></div><div class="line"><a name="l02309"></a><span class="lineno"> 2309</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN4_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN4_Pos) </span></div><div class="line"><a name="l02310"></a><span class="lineno"> 2310</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN4_Disabled (0)                                      </span></div><div class="line"><a name="l02311"></a><span class="lineno"> 2311</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN4_Enabled  (1)                                      </span></div><div class="line"><a name="l02314"></a><span class="lineno"> 2314</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN3: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02315"></a><span class="lineno"> 2315</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN3_Pos      (3)                                      </span></div><div class="line"><a name="l02316"></a><span class="lineno"> 2316</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN3_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN3_Pos) </span></div><div class="line"><a name="l02317"></a><span class="lineno"> 2317</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN3_Disabled (0)                                      </span></div><div class="line"><a name="l02318"></a><span class="lineno"> 2318</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN3_Enabled  (1)                                      </span></div><div class="line"><a name="l02321"></a><span class="lineno"> 2321</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN2: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02322"></a><span class="lineno"> 2322</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN2_Pos      (2)                                      </span></div><div class="line"><a name="l02323"></a><span class="lineno"> 2323</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN2_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN2_Pos) </span></div><div class="line"><a name="l02324"></a><span class="lineno"> 2324</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN2_Disabled (0)                                      </span></div><div class="line"><a name="l02325"></a><span class="lineno"> 2325</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN2_Enabled  (1)                                      </span></div><div class="line"><a name="l02328"></a><span class="lineno"> 2328</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN1: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02329"></a><span class="lineno"> 2329</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN1_Pos      (1)                                      </span></div><div class="line"><a name="l02330"></a><span class="lineno"> 2330</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN1_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN1_Pos) </span></div><div class="line"><a name="l02331"></a><span class="lineno"> 2331</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN1_Disabled (0)                                      </span></div><div class="line"><a name="l02332"></a><span class="lineno"> 2332</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN1_Enabled  (1)                                      </span></div><div class="line"><a name="l02335"></a><span class="lineno"> 2335</span>&#160;<span class="preprocessor"></span><span class="comment">/* Field PIN0: Enables high input mode for each (input-configured) IO. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02336"></a><span class="lineno"> 2336</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN0_Pos      (0)                                      </span></div><div class="line"><a name="l02337"></a><span class="lineno"> 2337</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN0_Msk      (0x1 &lt;&lt; DRV_SX1509_HIGHINPMODE_PIN0_Pos) </span></div><div class="line"><a name="l02338"></a><span class="lineno"> 2338</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN0_Disabled (0)                                      </span></div><div class="line"><a name="l02339"></a><span class="lineno"> 2339</span>&#160;<span class="preprocessor">#define DRV_SX1509_HIGHINPMODE_PIN0_Enabled  (1)                                      </span></div><div class="line"><a name="l02342"></a><span class="lineno"> 2342</span>&#160;<span class="preprocessor"></span><span class="comment">/* Register: RESET. */</span><span class="preprocessor"></span></div><div class="line"><a name="l02343"></a><span class="lineno"> 2343</span>&#160;<span class="comment">/* Description: Software reset register. */</span></div><div class="line"><a name="l02344"></a><span class="lineno"> 2344</span>&#160;</div><div class="line"><a name="l02345"></a><span class="lineno"> 2345</span>&#160;</div><div class="line"><a name="l02346"></a><span class="lineno"> 2346</span>&#160;<span class="comment">/* Field CODE: Reset code. */</span></div><div class="line"><a name="l02347"></a><span class="lineno"> 2347</span>&#160;<span class="preprocessor">#define DRV_SX1509_RESET_CODE_Pos   (0)                                   </span></div><div class="line"><a name="l02348"></a><span class="lineno"> 2348</span>&#160;<span class="preprocessor">#define DRV_SX1509_RESET_CODE_Msk   (0xFFFF &lt;&lt; DRV_SX1509_RESET_CODE_Pos) </span></div><div class="line"><a name="l02349"></a><span class="lineno"> 2349</span>&#160;<span class="preprocessor">#define DRV_SX1509_RESET_CODE_Reset (0x1234)                              </span></div><div class="line"><a name="l02351"></a><span class="lineno"> 2351</span>&#160;<span class="preprocessor">#endif // DRV_SX1509_BITFIELDS_H__</span></div></div><!-- fragment --></div><!-- contents -->
</div><!-- doc-content -->
<div id="nav-path" class="topicfooter">
<a href="mailto:docfeedback@nordicsemi.no?subject=Documentation%20feedback" id="maillink">Documentation feedback</a> | <a href="https://devzone.nordicsemi.com/questions/" target="_blank">Developer Zone</a> | <a href="http://response.nordicsemi.com/subscribe-to-our-newsletters" target="_blank">Subscribe</a> | Updated <span id="date"/>
<script>
var date = new Date("Thu Feb 7 2019" + " UTC");
document.getElementById("date").innerHTML = date.toJSON().slice(0, 10);
var url=window.location.href.split("?")[0];
var filename=url.substring(url.lastIndexOf('/')+1);
document.getElementById("maillink").href = "mailto:docfeedback@nordicsemi.no?subject=Documentation%20feedback"+decodeURIComponent("%26")+"body=File%20name%3A%20"+encodeURIComponent(filename);
</script>
</div>
</body>
</html>
